From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0ED80C433F5 for ; Tue, 5 Oct 2021 12:00:51 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C00C76138F for ; Tue, 5 Oct 2021 12:00:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C00C76138F Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=lexina.in Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3F57580FBE; Tue, 5 Oct 2021 14:00:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=lexina.in Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=lexina.in header.i=@lexina.in header.b="oj7LQqHN"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0485081468; Tue, 5 Oct 2021 14:00:46 +0200 (CEST) Received: from mx.msync.work (hh0.msync.work [95.217.35.189]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C661E801B2 for ; Tue, 5 Oct 2021 14:00:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=lexina.in Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=adeep@lexina.in Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id AF90A13877A; Tue, 5 Oct 2021 12:00:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=lexina.in; s=dkim; t=1633435241; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding; bh=eDaQEQBOeV+AjuJ30BUhxKO+dEUn+nohBuLkZlBKmdU=; b=oj7LQqHNa02de2EJr8AXjfEKsyf/8mGR/jE8IdNAS7BUja18Q6/lrd15VVEoIojhVT7jmu TYD42FMmq1qWaG9W+tUaZQPo41rCRpEXSBnzKPMPvqTAnJkrH0nBjGDkGbvvqiA7+hqHNv 0KIHzjpoFzBYpJuUZsGtg5i49AsQU+i5HWE9xdtIwMMLpXCBsY+68CaQwTRrSw7YpnYjvj Xq8q822/vgck0rH0S3ww8AwgFTeUW0HZdBjWUT6SExPnKrigqIG2Yp/82G6TYuHyy2T2Wh g4+2duTvLJdQWb1nGDz4qnT/6wy+aR7dcLDU3beKFBmhcFMbynqERUC5+1FWTg== From: Vyacheslav Bocharov To: Neil Armstrong Cc: u-boot@lists.denx.de, u-boot-amlogic@groups.io Subject: [PATCH] ARM: amlogic: add sm efuse write support and cmd for read/write efuse Date: Tue, 5 Oct 2021 15:00:03 +0300 Message-Id: <20211005120002.1147482-1-adeep@lexina.in> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean This adds support for amlogic efuse write and provides two subcommands of "sm" command: "efuseread" and "efusewrite" to read/write bytes between memory and efuse. Signed-off-by: Vyacheslav Bocharov --- arch/arm/mach-meson/sm.c | 68 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 67 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c index 1a8f23cb1fa..fb437b94d14 100644 --- a/arch/arm/mach-meson/sm.c +++ b/arch/arm/mach-meson/sm.c @@ -68,6 +68,26 @@ ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size) return regs.regs[0]; } +ssize_t meson_sm_write_efuse(uintptr_t offset, void *buffer, size_t size) +{ + struct pt_regs regs; + + meson_init_shmem(); + + memcpy(shmem_input, buffer, size); + + regs.regs[0] = FN_EFUSE_WRITE; + regs.regs[1] = offset; + regs.regs[2] = size; + + smc_call(®s); + + if (regs.regs[0] == 0) + return -1; + + return 0; +} + #define SM_CHIP_ID_LENGTH 119 #define SM_CHIP_ID_OFFSET 4 #define SM_CHIP_ID_SIZE 12 @@ -187,9 +207,53 @@ static int do_sm_reboot_reason(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_SUCCESS; } +static int do_efuse_read(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + ulong address, offset, size; + int ret; + + if (argc < 4) + return CMD_RET_USAGE; + + offset = simple_strtoul(argv[1], NULL, 0); + size = simple_strtoul(argv[2], NULL, 0); + + address = simple_strtoul(argv[3], NULL, 0); + + ret = meson_sm_read_efuse(offset, (void *)address, size); + if (ret) + return CMD_RET_FAILURE; + + return CMD_RET_SUCCESS; +} + +static int do_efuse_write(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + ulong address, offset, size; + int ret; + + if (argc < 4) + return CMD_RET_USAGE; + + offset = simple_strtoul(argv[1], NULL, 0); + size = simple_strtoul(argv[2], NULL, 0); + + address = simple_strtoul(argv[3], NULL, 0); + + ret = meson_sm_write_efuse(offset, (void *)address, size); + if (ret) + return CMD_RET_FAILURE; + + return CMD_RET_SUCCESS; +} + static struct cmd_tbl cmd_sm_sub[] = { U_BOOT_CMD_MKENT(serial, 2, 1, do_sm_serial, "", ""), U_BOOT_CMD_MKENT(reboot_reason, 1, 1, do_sm_reboot_reason, "", ""), + U_BOOT_CMD_MKENT(efuseread, 4, 1, do_efuse_read, "", ""), + U_BOOT_CMD_MKENT(efusewrite, 4, 0, do_efuse_write, "", ""), }; static int do_sm(struct cmd_tbl *cmdtp, int flag, int argc, @@ -216,5 +280,7 @@ U_BOOT_CMD( sm, 5, 0, do_sm, "Secure Monitor Control", "serial
- read chip unique id to memory address\n" - "sm reboot_reason [name] - get reboot reason and store to to environment" + "sm reboot_reason [name] - get reboot reason and store to to environment\n" + "sm efuseread
- read efuse to memory address\n" + "sm efusewrite
- write into efuse from memory address" ); -- 2.30.2