From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87770C433F5 for ; Wed, 6 Oct 2021 21:28:40 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 74ED2610CC for ; Wed, 6 Oct 2021 21:28:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 74ED2610CC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DECAE83490; Wed, 6 Oct 2021 23:28:36 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 899CA83310; Wed, 6 Oct 2021 23:28:25 +0200 (CEST) Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2257183310 for ; Wed, 6 Oct 2021 23:28:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=marcel@ziswiler.com Received: from toolbox.toradex.int ([66.171.181.186]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Me9Ie-1m8RRU0N02-00Pxoq; Wed, 06 Oct 2021 23:28:10 +0200 From: Marcel Ziswiler To: u-boot@lists.denx.de Cc: Stefano Babic , Heiko Thiery , Fabio Estevam , Frieder Schrempf , Marcel Ziswiler , Igor Opaniuk , Max Krummenacher , "NXP i.MX U-Boot Team" , Simon Glass Subject: [PATCH v4 02/10] verdin-imx8mm: fix ethernet Date: Wed, 6 Oct 2021 23:27:48 +0200 Message-Id: <20211006212757.464740-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20211006212757.464740-1-marcel@ziswiler.com> References: <20211006212757.464740-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Provags-ID: V03:K1:gUwpizu/23yg0MNDQqI9QEGF9IWoN9Tmykxkq0+bW06JsfNaWqa YCQKepvI6oNMvOWpdlp08Y3vdTVfhDig86eo+B+hyrwQ9x0Wo8ZFTkqeGqnJ+pqIrRXvqnx UNg0Fa6yy4EmjrQrlIlHS3XMR6MlqMN+JBaOq947mGLkX0kvDJ6/h+GC3w73OSBHhrAAnzO wJHXpfIrILM09ea3Tzrmw== X-UI-Out-Filterresults: notjunk:1;V03:K0:/x0v0dUdYsc=:g8P/NneL+zAsmbJow3S0Co Owd4ntWIPLwJHKYxmBpo2HO9fjFXgLaLvgu1jL/J+FzzhzyRJLKeJj1AgkYwqDLjjYa+QWIkY NNUYkHtWcsULxaVnqGaXdW1YUzaL0kyRCIOmbeeECn3j6Fq2b4z3aqtV5S4+EukFjrZt2cpJR 3Tc1TQ7cbgv9maj5+r8z0RyY4OIrvLvDz9m1SmB3dkfc5cTpSUB9qvQtDQyxwz4BOAm2piqXj 3xqnvu3BLDoKjRdnrIC7ezjVID6hngFpSTigXz0t4zh7y9831ZPODwcRYzevYFnBZEMzNnwSM GIS9jj8LeI7nXO1h+3ncc0ceiKLYemGZy7xt3BXAbmDanIChcWa5q7O3unBmQI3Pg5bH8DpkF MQR6MUAof68JW8wn+30TetzIWzjjTd+sTZqC3pHS/sJWuKXf/2D/EiIekBw7UQW/9UQR/9WrG ixtFySG3aVr1M2O3owVy/mbNIPep3WMDw7p8XWtd5n7xsnNbAuI8J+VlM9N0U9DiEqmywPERS iUphy2FVjz1NNYqKV+OC6qN/ngTk8JZXPq9Wshx1IyRBRdW8mqpi5nR6cuytChKLBkPr1Q1Kr nfOStTFMmFq5DbmU3SkCaA4x93P9Ollzz15xIq6LsvCpkD2UTPxJA9o+y8bhl3PeGvevhzlso jdYi65eZPIx8NB3mAmKL6D/ohke7ChY7s1cIY2ObGKeSL3obGx/w67NGg0kRSjrJmkTCTDueW 7RMcbzaMYCHydwHxAsXih+iJ16fpQrdG/JscSw== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Marcel Ziswiler Turns out Microship (formerly Micrel) meanwhile integrated proper support for the DLL setup on their KSZ9131. Unfortunately, this conflicts with our previous board code doing that. Fix this by getting rid of our board code and just relying on the generic implementation relying on rgmii-id being used as phy-mode. Fixes: commit c6df0e2ffdc4 ("net: phy: micrel: add support for DLL setup on ksz9131") Signed-off-by: Marcel Ziswiler Reviewed-by: Fabio Estevam --- (no changes since v1) arch/arm/dts/imx8mm-verdin.dts | 2 +- board/toradex/verdin-imx8mm/verdin-imx8mm.c | 64 --------------------- 2 files changed, 1 insertion(+), 65 deletions(-) diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts index fb0756d6e19..ac2a4b69d3c 100644 --- a/arch/arm/dts/imx8mm-verdin.dts +++ b/arch/arm/dts/imx8mm-verdin.dts @@ -160,7 +160,7 @@ &fec1 { fsl,magic-packet; phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <®_ethphy>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_fec1>; diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 76f4a1e209a..1644f4b3081 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -36,70 +36,6 @@ static int setup_fec(void) return 0; } - -int board_phy_config(struct phy_device *phydev) -{ - int tmp; - - switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) { - case PHY_ID_KSZ9031: - /* - * The PHY adds 1.2ns for the RXC and 0ns for TXC clock by - * default. The MAC and the layout don't add a skew between - * clock and data. - * Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for - * the TXC path to get the required clock skews. - */ - /* control data pad skew - devaddr = 0x02, register = 0x04 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x0070); - /* rx data pad skew - devaddr = 0x02, register = 0x05 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x7777); - /* tx data pad skew - devaddr = 0x02, register = 0x06 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x0000); - /* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x03f4); - break; - case PHY_ID_KSZ9131: - default: - /* read rxc dll control - devaddr = 0x2, register = 0x4c */ - tmp = ksz9031_phy_extended_read(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC); - /* disable rxdll bypass (enable 2ns skew delay on RXC) */ - tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS; - /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */ - tmp = ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp); - /* read txc dll control - devaddr = 0x02, register = 0x4d */ - tmp = ksz9031_phy_extended_read(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC); - /* disable txdll bypass (enable 2ns skew delay on TXC) */ - tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS; - /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */ - tmp = ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp); - break; - } - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} #endif int board_init(void) -- 2.26.2