From: Luca Weiss <luca@z3ntu.xyz> To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss <luca@z3ntu.xyz>, Andy Gross <agross@kernel.org>, Bjorn Andersson <bjorn.andersson@linaro.org>, Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/11] arm64: dts: qcom: sm6350: add debug uart Date: Thu, 7 Oct 2021 23:24:34 +0200 [thread overview] Message-ID: <20211007212444.328034-8-luca@z3ntu.xyz> (raw) In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> Add the necessary nodes for the debug uart on SM6350. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> --- v2: remove mux{} from pinctrl node, add drive-strength & bias-disable arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 ++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 95e69d9f8657..5becfb130be5 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -445,6 +445,30 @@ opp-384000000 { }; }; + qupv3_id_1: geniqup@9c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x9c0000 0x0 0x2000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + #address-cells = <2>; + #size-cells = <2>; + iommus = <&apps_smmu 0x4c3 0x0>; + ranges; + status = "disabled"; + + uart2: serial@98c000 { + compatible = "qcom,geni-debug-uart"; + reg = <0 0x98c000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart2_default>; + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -672,6 +696,13 @@ tlmm: pinctrl@f100000 { interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&tlmm 0 0 157>; + + qup_uart2_default: qup-uart2-default { + pins = "gpio25", "gpio26"; + function = "qup13_f2"; + drive-strength = <2>; + bias-disable; + }; }; apps_smmu: iommu@15000000 { -- 2.33.0
next prev parent reply other threads:[~2021-10-07 21:25 UTC|newest] Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-07 21:24 [PATCH v2 00/11] Initial Fairphone 4 support Luca Weiss 2021-10-07 21:24 ` [PATCH v2 01/11] clk: qcom: add select QCOM_GDSC for SM6350 Luca Weiss 2021-10-13 18:44 ` Stephen Boyd 2021-10-07 21:24 ` [PATCH v2 02/11] dt-bindings: regulator: qcom,rpmh: Add compatible for PM6350 Luca Weiss 2021-10-18 19:53 ` Rob Herring 2021-10-07 21:24 ` [PATCH v2 03/11] regulator: qcom-rpmh: Add PM6350 regulators Luca Weiss 2021-10-07 21:24 ` [PATCH v2 04/11] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for PM6350 Luca Weiss 2021-10-12 23:48 ` Linus Walleij 2021-10-07 21:24 ` [PATCH v2 05/11] pinctrl: qcom: spmi-gpio: " Luca Weiss 2021-10-12 23:48 ` Linus Walleij 2021-10-07 21:24 ` [PATCH v2 06/11] arm64: dts: qcom: Add PM6350 PMIC Luca Weiss 2021-10-07 21:24 ` Luca Weiss [this message] 2021-10-07 21:24 ` [PATCH v2 08/11] dt-bindings: arm: cpus: Add Kryo 570 CPUs Luca Weiss 2021-10-18 19:55 ` Rob Herring 2021-10-07 21:24 ` [PATCH v2 09/11] dt-bindings: arm: qcom: Document sm7225 and fairphone,fp4 board Luca Weiss 2021-10-18 19:56 ` Rob Herring 2021-10-07 21:24 ` [PATCH v2 10/11] arm64: dts: qcom: Add SM7225 device tree Luca Weiss 2021-10-07 21:24 ` [PATCH v2 11/11] arm64: dts: qcom: sm7225: Add device tree for Fairphone 4 Luca Weiss 2021-10-22 0:52 ` (subset) [PATCH v2 00/11] Initial Fairphone 4 support Mark Brown
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