From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF92EC433F5 for ; Sat, 9 Oct 2021 01:41:58 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id 7C30060FDC for ; Sat, 9 Oct 2021 01:41:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7C30060FDC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 739C2410F7; Sat, 9 Oct 2021 03:41:50 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id EDC30410F7 for ; Sat, 9 Oct 2021 03:41:48 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10131"; a="312816969" X-IronPort-AV: E=Sophos;i="5.85,358,1624345200"; d="scan'208";a="312816969" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2021 18:41:48 -0700 X-IronPort-AV: E=Sophos;i="5.85,358,1624345200"; d="scan'208";a="489686939" Received: from unknown (HELO intel-npg-odc-srv03.cd.intel.com) ([10.240.178.145]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2021 18:41:40 -0700 From: Robin Zhang To: dev@dpdk.org Cc: beilei.xing@intel.com, qi.z.zhang@intel.com, helin.zhang@intel.com, jingjing.wu@intel.com, remy.horton@intel.com, jijiang.liu@intel.com, jing.d.chen@intel.com, cunming.liang@intel.com, wenzhuo.lu@intel.com, junfeng.guo@intel.com, stevex.yang@intel.com, Robin Zhang , Stanislaw Grzeszczak Date: Sat, 9 Oct 2021 01:26:35 +0000 Message-Id: <20211009012648.64838-5-robinx.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211009012648.64838-1-robinx.zhang@intel.com> References: <20210618063851.3694702-1-robinx.zhang@intel.com> <20211009012648.64838-1-robinx.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v5 04/17] net/i40e/base: define new shadow RAM pointers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add definitions for Shadow RAM pointers: 6th FPA(Free Provisioning Area) module, 5th FPA module in X722 and Preservation Rules module. These definations are not using by DPDK now, the purpose of this commit is sync with latest share code. Signed-off-by: Stanislaw Grzeszczak Signed-off-by: Robin Zhang --- drivers/net/i40e/base/i40e_type.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index cf41345834..e5a3729183 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -1555,6 +1555,9 @@ struct i40e_hw_port_stats { #define I40E_SR_FEATURE_CONFIGURATION_PTR 0x49 #define I40E_SR_CONFIGURATION_METADATA_PTR 0x4D #define I40E_SR_IMMEDIATE_VALUES_PTR 0x4E +#define I40E_SR_PRESERVATION_RULES_PTR 0x70 +#define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR 0x71 +#define I40E_SR_6TH_FREE_PROVISION_AREA_PTR 0x71 /* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */ #define I40E_SR_VPD_MODULE_MAX_SIZE 1024 -- 2.25.1