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From: Ansuel Smith <ansuelsmth@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>,
	Vivien Didelot <vivien.didelot@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Vladimir Oltean <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Russell King <linux@armlinux.org.uk>,
	John Crispin <john@phrozen.org>,
	Ansuel Smith <ansuelsmth@gmail.com>,
	netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: [net-next PATCH v6 05/16] net: dsa: qca8k: add support for cpu port 6
Date: Wed, 13 Oct 2021 03:16:11 +0200	[thread overview]
Message-ID: <20211013011622.10537-6-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20211013011622.10537-1-ansuelsmth@gmail.com>

Currently CPU port is always hardcoded to port 0. This switch have 2 CPU
ports. The original intention of this driver seems to be use the
mac06_exchange bit to swap MAC0 with MAC6 in the strange configuration
where device have connected only the CPU port 6. To skip the
introduction of a new binding, rework the driver to address the
secondary CPU port as primary and drop any reference of hardcoded port.
With configuration of mac06 exchange, just skip the definition of port0
and define the CPU port as a secondary. The driver will autoconfigure
the switch to use that as the primary CPU port.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
 drivers/net/dsa/qca8k.c | 50 +++++++++++++++++++++++++++++------------
 drivers/net/dsa/qca8k.h |  2 --
 2 files changed, 36 insertions(+), 16 deletions(-)

diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 22d6e4abb986..1998090a4c6b 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -977,6 +977,22 @@ qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv)
 	return ret;
 }
 
+static int qca8k_find_cpu_port(struct dsa_switch *ds)
+{
+	struct qca8k_priv *priv = ds->priv;
+
+	/* Find the connected cpu port. Valid port are 0 or 6 */
+	if (dsa_is_cpu_port(ds, 0))
+		return 0;
+
+	dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6");
+
+	if (dsa_is_cpu_port(ds, 6))
+		return 6;
+
+	return -EINVAL;
+}
+
 static int
 qca8k_parse_port_config(struct qca8k_priv *priv)
 {
@@ -1017,13 +1033,14 @@ static int
 qca8k_setup(struct dsa_switch *ds)
 {
 	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	u8 cpu_port;
 	int ret, i;
 	u32 mask;
 
-	/* Make sure that port 0 is the cpu port */
-	if (!dsa_is_cpu_port(ds, 0)) {
-		dev_err(priv->dev, "port 0 is not the CPU port");
-		return -EINVAL;
+	cpu_port = qca8k_find_cpu_port(ds);
+	if (cpu_port < 0) {
+		dev_err(priv->dev, "No cpu port configured in both cpu port0 and port6");
+		return cpu_port;
 	}
 
 	/* Parse CPU port config to be later used in phy_link mac_config */
@@ -1065,7 +1082,7 @@ qca8k_setup(struct dsa_switch *ds)
 		dev_warn(priv->dev, "mib init failed");
 
 	/* Enable QCA header mode on the cpu port */
-	ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(QCA8K_CPU_PORT),
+	ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(cpu_port),
 			  QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_TX_S |
 			  QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_RX_S);
 	if (ret) {
@@ -1087,10 +1104,10 @@ qca8k_setup(struct dsa_switch *ds)
 
 	/* Forward all unknown frames to CPU port for Linux processing */
 	ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1,
-			  BIT(0) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
-			  BIT(0) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
-			  BIT(0) << QCA8K_GLOBAL_FW_CTRL1_MC_DP_S |
-			  BIT(0) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S);
+			  BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
+			  BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
+			  BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_MC_DP_S |
+			  BIT(cpu_port) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S);
 	if (ret)
 		return ret;
 
@@ -1098,7 +1115,7 @@ qca8k_setup(struct dsa_switch *ds)
 	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
 		/* CPU port gets connected to all user ports of the switch */
 		if (dsa_is_cpu_port(ds, i)) {
-			ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT),
+			ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(cpu_port),
 					QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds));
 			if (ret)
 				return ret;
@@ -1110,7 +1127,7 @@ qca8k_setup(struct dsa_switch *ds)
 
 			ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
 					QCA8K_PORT_LOOKUP_MEMBER,
-					BIT(QCA8K_CPU_PORT));
+					BIT(cpu_port));
 			if (ret)
 				return ret;
 
@@ -1616,9 +1633,12 @@ static int
 qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br)
 {
 	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
-	int port_mask = BIT(QCA8K_CPU_PORT);
+	int port_mask, cpu_port;
 	int i, ret;
 
+	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
+	port_mask = BIT(cpu_port);
+
 	for (i = 1; i < QCA8K_NUM_PORTS; i++) {
 		if (dsa_to_port(ds, i)->bridge_dev != br)
 			continue;
@@ -1645,7 +1665,9 @@ static void
 qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br)
 {
 	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
-	int i;
+	int cpu_port, i;
+
+	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
 
 	for (i = 1; i < QCA8K_NUM_PORTS; i++) {
 		if (dsa_to_port(ds, i)->bridge_dev != br)
@@ -1662,7 +1684,7 @@ qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br)
 	 * this port
 	 */
 	qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
-		  QCA8K_PORT_LOOKUP_MEMBER, BIT(QCA8K_CPU_PORT));
+		  QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port));
 }
 
 static int
diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h
index bc9c89dd7e71..781521e6a965 100644
--- a/drivers/net/dsa/qca8k.h
+++ b/drivers/net/dsa/qca8k.h
@@ -24,8 +24,6 @@
 
 #define QCA8K_NUM_FDB_RECORDS				2048
 
-#define QCA8K_CPU_PORT					0
-
 #define QCA8K_PORT_VID_DEF				1
 
 /* Global control registers */
-- 
2.32.0


  parent reply	other threads:[~2021-10-13  1:16 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-13  1:16 [net-next PATCH v6 00/16] Multiple improvement for qca8337 switch Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 01/16] dsa: qca8k: add mac_power_sel support Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 02/16] dt-bindings: net: dsa: qca8k: Add SGMII clock phase properties Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 03/16] net: dsa: qca8k: add support for sgmii falling edge Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 04/16] dt-bindings: net: dsa: qca8k: Document support for CPU port 6 Ansuel Smith
2021-10-13  1:16 ` Ansuel Smith [this message]
2021-10-13  4:10   ` [net-next PATCH v6 05/16] net: dsa: qca8k: add support for cpu " DENG Qingfang
2021-10-13 11:42     ` Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 06/16] net: dsa: qca8k: rework rgmii delay logic and scan " Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 07/16] dt-bindings: net: dsa: qca8k: Document qca,sgmii-enable-pll Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 08/16] net: dsa: qca8k: add explicit SGMII PLL enable Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 09/16] dt-bindings: net: dsa: qca8k: Document qca,led-open-drain binding Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 10/16] net: dsa: qca8k: add support for pws config reg Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 11/16] dt-bindings: net: dsa: qca8k: document support for qca8328 Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 12/16] net: dsa: qca8k: add support for QCA8328 Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 13/16] net: dsa: qca8k: set internal delay also for sgmii Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 14/16] net: dsa: qca8k: move port config to dedicated struct Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 15/16] dt-bindings: net: dsa: qca8k: convert to YAML schema Ansuel Smith
2021-10-13  3:08   ` Rob Herring
2021-10-13 10:30     ` Ansuel Smith
2021-10-13  1:16 ` [net-next PATCH v6 16/16] dt-bindings: net: ipq8064-mdio: fix warning with new qca8k switch Ansuel Smith

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