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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E . Iglesias" <edgar.iglesias@xilinx.com>
Subject: [PATCH v4 06/48] target/microblaze: Do not set MO_ALIGN for user-only
Date: Tue, 12 Oct 2021 19:45:25 -0700	[thread overview]
Message-ID: <20211013024607.731881-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211013024607.731881-1-richard.henderson@linaro.org>

The kernel will fix up unaligned accesses, so emulate that
by allowing unaligned accesses to succeed.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/microblaze/translate.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index a14ffed784..ef44bca2fd 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -727,6 +727,7 @@ static TCGv compute_ldst_addr_ea(DisasContext *dc, int ra, int rb)
 }
 #endif
 
+#ifndef CONFIG_USER_ONLY
 static void record_unaligned_ess(DisasContext *dc, int rd,
                                  MemOp size, bool store)
 {
@@ -739,6 +740,7 @@ static void record_unaligned_ess(DisasContext *dc, int rd,
 
     tcg_set_insn_start_param(dc->insn_start, 1, iflags);
 }
+#endif
 
 static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
                     int mem_index, bool rev)
@@ -760,12 +762,19 @@ static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
         }
     }
 
+    /*
+     * For system mode, enforce alignment if the cpu configuration
+     * requires it.  For user-mode, the Linux kernel will have fixed up
+     * any unaligned access, so emulate that by *not* setting MO_ALIGN.
+     */
+#ifndef CONFIG_USER_ONLY
     if (size > MO_8 &&
         (dc->tb_flags & MSR_EE) &&
         dc->cfg->unaligned_exceptions) {
         record_unaligned_ess(dc, rd, size, false);
         mop |= MO_ALIGN;
     }
+#endif
 
     tcg_gen_qemu_ld_i32(reg_for_write(dc, rd), addr, mem_index, mop);
 
@@ -906,12 +915,19 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
         }
     }
 
+    /*
+     * For system mode, enforce alignment if the cpu configuration
+     * requires it.  For user-mode, the Linux kernel will have fixed up
+     * any unaligned access, so emulate that by *not* setting MO_ALIGN.
+     */
+#ifndef CONFIG_USER_ONLY
     if (size > MO_8 &&
         (dc->tb_flags & MSR_EE) &&
         dc->cfg->unaligned_exceptions) {
         record_unaligned_ess(dc, rd, size, true);
         mop |= MO_ALIGN;
     }
+#endif
 
     tcg_gen_qemu_st_i32(reg_for_read(dc, rd), addr, mem_index, mop);
 
-- 
2.25.1



  parent reply	other threads:[~2021-10-13  2:48 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-13  2:45 [PATCH v4 00/48] Richard Henderson
2021-10-13  2:45 ` [PATCH v4 01/48] hw/core: Add TCGCPUOps.record_sigbus Richard Henderson
2021-10-13  2:45 ` [PATCH v4 02/48] linux-user: Add cpu_loop_exit_sigbus Richard Henderson
2021-10-13  2:45 ` [PATCH v4 03/48] linux-user/alpha: Remove EXCP_UNALIGN handling Richard Henderson
2021-10-13  2:45 ` [PATCH v4 04/48] target/arm: Implement arm_cpu_record_sigbus Richard Henderson
2021-10-13  2:45 ` [PATCH v4 05/48] linux-user/hppa: Remove EXCP_UNALIGN handling Richard Henderson
2021-10-13  2:45 ` Richard Henderson [this message]
2021-10-13  2:45 ` [PATCH v4 07/48] target/ppc: Move SPR_DSISR setting to powerpc_excp Richard Henderson
2021-10-13  2:45 ` [PATCH v4 08/48] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-10-13  2:45 ` [PATCH v4 09/48] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu Richard Henderson
2021-10-13  2:54   ` Warner Losh
2021-10-13  2:45 ` [PATCH v4 10/48] target/s390x: Implement s390x_cpu_record_sigbus Richard Henderson
2021-10-13  2:45 ` [PATCH v4 11/48] linux-user/hppa: Remove POWERPC_EXCP_ALIGN handling Richard Henderson
2021-10-13  2:45 ` [PATCH v4 12/48] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-10-13  2:45 ` [PATCH v4 13/48] target/sparc: Remove DEBUG_UNALIGNED Richard Henderson
2021-10-13  2:45 ` [PATCH v4 14/48] target/sparc: Split out build_sfsr Richard Henderson
2021-10-13  2:45 ` [PATCH v4 15/48] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-10-13  2:45 ` [PATCH v4 16/48] accel/tcg: Report unaligned atomics for user-only Richard Henderson
2021-10-13  2:45 ` [PATCH v4 17/48] target/arm: Use MO_128 for 16 byte atomics Richard Henderson
2021-10-13  2:45 ` [PATCH v4 18/48] target/i386: " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 19/48] target/ppc: " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 20/48] target/s390x: " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 21/48] target/hexagon: Implement cpu_mmu_index Richard Henderson
2021-10-13  2:45 ` [PATCH v4 22/48] accel/tcg: Add cpu_{ld,st}*_mmu interfaces Richard Henderson
2021-10-13  2:45 ` [PATCH v4 23/48] accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h Richard Henderson
2021-10-13  2:45 ` [PATCH v4 24/48] target/mips: Use cpu_*_data_ra for msa load/store Richard Henderson
2021-10-13  2:45 ` [PATCH v4 25/48] target/mips: Use 8-byte memory ops " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 26/48] target/s390x: Use cpu_*_mmu instead of helper_*_mmu Richard Henderson
2021-10-13  2:45 ` [PATCH v4 27/48] target/sparc: " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 28/48] target/arm: " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 29/48] tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h Richard Henderson
2021-10-13  2:45 ` [PATCH v4 30/48] tcg: Add helper_unaligned_{ld, st} for user-only sigbus Richard Henderson
2021-10-13  2:45 ` [PATCH v4 31/48] linux-user: Split out do_prctl and subroutines Richard Henderson
2021-10-13  2:45 ` [PATCH v4 32/48] linux-user: Disable more prctl subcodes Richard Henderson
2021-10-13  2:45 ` [PATCH v4 33/48] Revert "cpu: Move cpu_common_props to hw/core/cpu.c" Richard Henderson
2021-10-13  2:45 ` [PATCH v4 34/48] linux-user: Add code for PR_GET/SET_UNALIGN Richard Henderson
2021-10-13  2:45 ` [PATCH v4 35/48] target/alpha: Reorg fp memory operations Richard Henderson
2021-10-13  2:45 ` [PATCH v4 36/48] target/alpha: Reorg integer " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 37/48] target/alpha: Implement prctl_unalign_sigbus Richard Henderson
2021-10-13  2:45 ` [PATCH v4 38/48] target/hppa: " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 39/48] target/sh4: " Richard Henderson
2021-10-13  2:45 ` [PATCH v4 40/48] linux-user/signal: Handle BUS_ADRALN in host_signal_handler Richard Henderson
2021-10-13  2:46 ` [PATCH v4 41/48] tcg: Canonicalize alignment flags in MemOp Richard Henderson
2021-10-13  2:46 ` [PATCH v4 42/48] tcg/i386: Support raising sigbus for user-only Richard Henderson
2021-10-13  2:46 ` [PATCH v4 43/48] tcg/aarch64: " Richard Henderson
2021-10-13  2:46 ` [PATCH v4 44/48] tcg/ppc: " Richard Henderson
2021-10-13  2:46 ` [PATCH v4 45/48] tcg/s390: " Richard Henderson
2021-10-13  2:46 ` [PATCH v4 46/48] tcg/tci: " Richard Henderson
2021-10-13  2:46 ` [PATCH v4 47/48] tcg/riscv: " Richard Henderson
2021-10-13  2:46 ` [PATCH v4 48/48] tests/tcg/multiarch: Add sigbus.c Richard Henderson

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