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[213.175.37.12]) by smtp.gmail.com with ESMTPSA id y5sm4715733wrq.85.2021.10.15.06.30.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Oct 2021 06:30:40 -0700 (PDT) Date: Fri, 15 Oct 2021 15:30:38 +0200 From: Andrew Jones To: Reiji Watanabe Subject: Re: [RFC PATCH 03/25] KVM: arm64: Introduce a validation function for an ID register Message-ID: <20211015133038.xfyez4rvxbs5ihmg@gator> References: <20211012043535.500493-1-reijiw@google.com> <20211012043535.500493-4-reijiw@google.com> MIME-Version: 1.0 In-Reply-To: <20211012043535.500493-4-reijiw@google.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=drjones@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline Cc: kvm@vger.kernel.org, Marc Zyngier , Peter Shier , Will Deacon , Paolo Bonzini , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Mon, Oct 11, 2021 at 09:35:13PM -0700, Reiji Watanabe wrote: > Introduce arm64_check_features(), which does a basic validity checking > of an ID register value against the register's limit value that KVM > can support. > This function will be used by the following patches to check if an ID > register value that userspace tries to set can be supported by KVM on > the host. > > Signed-off-by: Reiji Watanabe > --- > arch/arm64/include/asm/cpufeature.h | 1 + > arch/arm64/kernel/cpufeature.c | 26 ++++++++++++++++++++++++++ > 2 files changed, 27 insertions(+) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index ef6be92b1921..eda7ddbed8cf 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -631,6 +631,7 @@ void check_local_cpu_capabilities(void); > > u64 read_sanitised_ftr_reg(u32 id); > u64 __read_sysreg_by_encoding(u32 sys_id); > +int arm64_check_features(u32 sys_reg, u64 val, u64 limit); > > static inline bool cpu_supports_mixed_endian_el0(void) > { > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 6ec7036ef7e1..d146ef759435 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -3114,3 +3114,29 @@ ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, > return sprintf(buf, "Vulnerable\n"); > } > } > + > +/* > + * Check if all features that are indicated in the given ID register value > + * ('val') are also indicated in the 'limit'. Maybe use @ syntax to reference the parameters, even though this file doesn't seem to adopt that anywhere else... > + */ > +int arm64_check_features(u32 sys_reg, u64 val, u64 limit) > +{ > + struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg); > + const struct arm64_ftr_bits *ftrp; > + u64 exposed_mask = 0; > + > + if (!reg) > + return -ENOENT; > + > + for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) { > + if (arm64_ftr_value(ftrp, val) > arm64_ftr_value(ftrp, limit)) Hmm. Are we sure that '>' is the correct operator for all comparisons? It seems like we need a arm64_ftr_compare() function that takes arm64_ftr_bits.type and .sign into account. > + return -E2BIG; > + > + exposed_mask |= arm64_ftr_mask(ftrp); > + } > + > + if (val & ~exposed_mask) > + return -E2BIG; I'm not sure we want this. I think it implies that any RAO bits need to be cleared before calling this function, which could be inconvenient. Thanks, drew > + > + return 0; > +} > -- > 2.33.0.882.g93a45727a2-goog > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24F2DC433FE for ; Fri, 15 Oct 2021 13:31:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0EA75611C8 for ; Fri, 15 Oct 2021 13:31:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239575AbhJONeA (ORCPT ); Fri, 15 Oct 2021 09:34:00 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:30854 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239813AbhJONcu (ORCPT ); Fri, 15 Oct 2021 09:32:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1634304643; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=TzclPTF3LlBIf4dbbRNEyBzW3ai4bqqCccg0ARotygI=; b=crYAenY2G1RE7Ie5Fcpy4+2nil1KetSJswBZ1HkHS7maZjWqxZr30IJ2B/bxzaNnOLvPIb ioa2HpWBoFUVq3oFlDXRAqMEsPShHpqdinF6UfZm4fOIbw69G7RKnBJ5gyCsbAFW0txR54 lGtEXVD6Cm59Exm0c4LctxdoOnOUCEk= Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-268-laQ37q_cOO-iJC8D29JyVA-1; Fri, 15 Oct 2021 09:30:42 -0400 X-MC-Unique: laQ37q_cOO-iJC8D29JyVA-1 Received: by mail-wm1-f71.google.com with SMTP id p63-20020a1c2942000000b0030ccf0767baso876173wmp.6 for ; Fri, 15 Oct 2021 06:30:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=TzclPTF3LlBIf4dbbRNEyBzW3ai4bqqCccg0ARotygI=; b=MlMSrxQHjLxccexDKp+vrr/99KxswJSYW578he/1RFvkzPd2BVwUWyF4mJkvkeSAd6 wQKHPwWUdTTTD6cQm/uDQtJJ7oaBy045jrMjKdSJgPohrYkA2qcnN0qMqpcOgRnQBgDj Rsbl8k/uWll9xbZwaxwigB1jyfhSl/vg2CrSlw8lIw0EHpspUjivnoos/qkUyKnbv+mv VU5TAqN7izc/dKtvYIcQ2qgORSYZSfliEImn9Nh+avO0zv4FCFaVzzlZVkEUUNXgRFNh 9LkuTrmuITEGv8dXgH0Nulk3hM9Clt+nrrEpXN+PGWepnGL6MLC2B4puozlmAbQVgrvj QtJA== X-Gm-Message-State: AOAM530Dx10jUUuIgvK+sWQHKk6Qe8MGNzwDMT3xwgfWTCVb6J560R1O sxiVEXJtD/QTpOVJvUOL5f0p+DQUXYDM6b1ezjmzt63SCvqaiDcRDmwOw9V4O06IY5Oo5LsJzZD 0MtVHjH3OkwMg X-Received: by 2002:a05:6000:188e:: with SMTP id a14mr13773715wri.223.1634304640907; Fri, 15 Oct 2021 06:30:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyUVezSIzJykePD1chYmayDwCb5Y2ipNT/EUSs/rogejtsd3QRAM6NctsUUaVjY+/q5r5cySQ== X-Received: by 2002:a05:6000:188e:: with SMTP id a14mr13773693wri.223.1634304640760; Fri, 15 Oct 2021 06:30:40 -0700 (PDT) Received: from gator (nat-pool-brq-u.redhat.com. [213.175.37.12]) by smtp.gmail.com with ESMTPSA id y5sm4715733wrq.85.2021.10.15.06.30.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Oct 2021 06:30:40 -0700 (PDT) Date: Fri, 15 Oct 2021 15:30:38 +0200 From: Andrew Jones To: Reiji Watanabe Cc: Marc Zyngier , kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Will Deacon , Peng Liang , Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata Subject: Re: [RFC PATCH 03/25] KVM: arm64: Introduce a validation function for an ID register Message-ID: <20211015133038.xfyez4rvxbs5ihmg@gator> References: <20211012043535.500493-1-reijiw@google.com> <20211012043535.500493-4-reijiw@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211012043535.500493-4-reijiw@google.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Mon, Oct 11, 2021 at 09:35:13PM -0700, Reiji Watanabe wrote: > Introduce arm64_check_features(), which does a basic validity checking > of an ID register value against the register's limit value that KVM > can support. > This function will be used by the following patches to check if an ID > register value that userspace tries to set can be supported by KVM on > the host. > > Signed-off-by: Reiji Watanabe > --- > arch/arm64/include/asm/cpufeature.h | 1 + > arch/arm64/kernel/cpufeature.c | 26 ++++++++++++++++++++++++++ > 2 files changed, 27 insertions(+) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index ef6be92b1921..eda7ddbed8cf 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -631,6 +631,7 @@ void check_local_cpu_capabilities(void); > > u64 read_sanitised_ftr_reg(u32 id); > u64 __read_sysreg_by_encoding(u32 sys_id); > +int arm64_check_features(u32 sys_reg, u64 val, u64 limit); > > static inline bool cpu_supports_mixed_endian_el0(void) > { > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 6ec7036ef7e1..d146ef759435 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -3114,3 +3114,29 @@ ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, > return sprintf(buf, "Vulnerable\n"); > } > } > + > +/* > + * Check if all features that are indicated in the given ID register value > + * ('val') are also indicated in the 'limit'. Maybe use @ syntax to reference the parameters, even though this file doesn't seem to adopt that anywhere else... > + */ > +int arm64_check_features(u32 sys_reg, u64 val, u64 limit) > +{ > + struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg); > + const struct arm64_ftr_bits *ftrp; > + u64 exposed_mask = 0; > + > + if (!reg) > + return -ENOENT; > + > + for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) { > + if (arm64_ftr_value(ftrp, val) > arm64_ftr_value(ftrp, limit)) Hmm. Are we sure that '>' is the correct operator for all comparisons? It seems like we need a arm64_ftr_compare() function that takes arm64_ftr_bits.type and .sign into account. > + return -E2BIG; > + > + exposed_mask |= arm64_ftr_mask(ftrp); > + } > + > + if (val & ~exposed_mask) > + return -E2BIG; I'm not sure we want this. I think it implies that any RAO bits need to be cleared before calling this function, which could be inconvenient. Thanks, drew > + > + return 0; > +} > -- > 2.33.0.882.g93a45727a2-goog > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA053C433FE for ; Fri, 15 Oct 2021 13:32:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8C43E61151 for ; Fri, 15 Oct 2021 13:32:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 8C43E61151 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=i7AQB/jPOy3+bu4YJjk9NyQ1t0KtOqmHYWgklwcZYaM=; b=seFrb5B/FioYPW WBlIArGX68T4WTj1syCEt9kI2zoxX24eRX57Ojy+dymZKWRjbGURLLPzYDF59YffosC5WVysz4HIY z7F3ryBMlkBgbvdd9CPGir85Oocy9ZMvEkqufkfXLCS7N2vXhE+I/1tkCltKYw1NTuI0nf1FgW4oW VNoUK4mGHPzGbHHGJ8OCfdWADbe/23H5/LOmTkhKCsdeGe5FQN82KHQItHaVOAc4IRPGfYE6288H4 +DrH0/dMeqnGjp4M8yISYJAp62XsIRHEpNtLSRrQuH9mgZSYA/pOSJQEi4q+N1XyRriNCuVqATE4F G+OLMull8DriOpONlrsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbNIZ-007FId-26; Fri, 15 Oct 2021 13:30:59 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbNIL-007FDO-UI for linux-arm-kernel@lists.infradead.org; Fri, 15 Oct 2021 13:30:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1634304644; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=TzclPTF3LlBIf4dbbRNEyBzW3ai4bqqCccg0ARotygI=; b=Qzy+0Ey7/tZVebRR44EdnMuSC8SLuVCsZqqYfMvfSFyzmVLM20pBJtCLqqiwbx1HA0IATN lk0hSXTAfQKkzDO0PfAEVKU3NZcS0PkoO/uDH1pna1Q5MOTpsD6B0KaHT5uW76k87sBgf9 hyUErrDZtiuuiuzwEchoVpoYto0TG0U= Received: from mail-wr1-f69.google.com (mail-wr1-f69.google.com [209.85.221.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-268-TV0X0gWtMzmo-ntlJqcaxA-1; Fri, 15 Oct 2021 09:30:42 -0400 X-MC-Unique: TV0X0gWtMzmo-ntlJqcaxA-1 Received: by mail-wr1-f69.google.com with SMTP id c4-20020a5d6cc4000000b00160edc8bb28so5932681wrc.9 for ; Fri, 15 Oct 2021 06:30:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=TzclPTF3LlBIf4dbbRNEyBzW3ai4bqqCccg0ARotygI=; b=Gzd/CfJPKPyGj1GpXUp+iPXVPYPLy7acNMoGsSFcg2HPBuFdNS3IrwfYqnggxAhiIY fJu3DOcOXyq4SMtHxkfdHAA9OUBRu0XxYYw41Z0XoiThiAAh/OGiEmzv+ZrKTVPVYYpl N7cZBHHlX+r1m1W3UX0iVo+j0iAIRutJz0schtnxc6McOWArCV/2uOUnBYivODe9630+ W/t/LXth3ttVULIeplXew2ytYSjSV01FbrpA/7WQTV0lgWHi39v5rlYe93UOtdICXvOt 2evgU6oc9rsDdVSGk1JTJHLRCnD6gS/1DdoQE57Ms1FCtr61TNyazk7qcaDC542yv05+ 5/IQ== X-Gm-Message-State: AOAM533KuwTlcf3egqSW0eVuB1FgQpSa416M52Z4xA5CFRMXsrnGCdRg xH5ITt0EC98POrEVDhqc/a5+KQ1GhGuEodYFs1t27vFgLbDfpSg4cj5hmS8oEnLCTCjATITl+P/ BO9x48t8KUbLXMSlugjHBw5l/dAhnw8/aPfQ= X-Received: by 2002:a05:6000:188e:: with SMTP id a14mr13773718wri.223.1634304640909; Fri, 15 Oct 2021 06:30:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyUVezSIzJykePD1chYmayDwCb5Y2ipNT/EUSs/rogejtsd3QRAM6NctsUUaVjY+/q5r5cySQ== X-Received: by 2002:a05:6000:188e:: with SMTP id a14mr13773693wri.223.1634304640760; Fri, 15 Oct 2021 06:30:40 -0700 (PDT) Received: from gator (nat-pool-brq-u.redhat.com. [213.175.37.12]) by smtp.gmail.com with ESMTPSA id y5sm4715733wrq.85.2021.10.15.06.30.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Oct 2021 06:30:40 -0700 (PDT) Date: Fri, 15 Oct 2021 15:30:38 +0200 From: Andrew Jones To: Reiji Watanabe Cc: Marc Zyngier , kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Will Deacon , Peng Liang , Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata Subject: Re: [RFC PATCH 03/25] KVM: arm64: Introduce a validation function for an ID register Message-ID: <20211015133038.xfyez4rvxbs5ihmg@gator> References: <20211012043535.500493-1-reijiw@google.com> <20211012043535.500493-4-reijiw@google.com> MIME-Version: 1.0 In-Reply-To: <20211012043535.500493-4-reijiw@google.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=drjones@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211015_063046_116338_90927951 X-CRM114-Status: GOOD ( 26.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Oct 11, 2021 at 09:35:13PM -0700, Reiji Watanabe wrote: > Introduce arm64_check_features(), which does a basic validity checking > of an ID register value against the register's limit value that KVM > can support. > This function will be used by the following patches to check if an ID > register value that userspace tries to set can be supported by KVM on > the host. > > Signed-off-by: Reiji Watanabe > --- > arch/arm64/include/asm/cpufeature.h | 1 + > arch/arm64/kernel/cpufeature.c | 26 ++++++++++++++++++++++++++ > 2 files changed, 27 insertions(+) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index ef6be92b1921..eda7ddbed8cf 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -631,6 +631,7 @@ void check_local_cpu_capabilities(void); > > u64 read_sanitised_ftr_reg(u32 id); > u64 __read_sysreg_by_encoding(u32 sys_id); > +int arm64_check_features(u32 sys_reg, u64 val, u64 limit); > > static inline bool cpu_supports_mixed_endian_el0(void) > { > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 6ec7036ef7e1..d146ef759435 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -3114,3 +3114,29 @@ ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, > return sprintf(buf, "Vulnerable\n"); > } > } > + > +/* > + * Check if all features that are indicated in the given ID register value > + * ('val') are also indicated in the 'limit'. Maybe use @ syntax to reference the parameters, even though this file doesn't seem to adopt that anywhere else... > + */ > +int arm64_check_features(u32 sys_reg, u64 val, u64 limit) > +{ > + struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg); > + const struct arm64_ftr_bits *ftrp; > + u64 exposed_mask = 0; > + > + if (!reg) > + return -ENOENT; > + > + for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) { > + if (arm64_ftr_value(ftrp, val) > arm64_ftr_value(ftrp, limit)) Hmm. Are we sure that '>' is the correct operator for all comparisons? It seems like we need a arm64_ftr_compare() function that takes arm64_ftr_bits.type and .sign into account. > + return -E2BIG; > + > + exposed_mask |= arm64_ftr_mask(ftrp); > + } > + > + if (val & ~exposed_mask) > + return -E2BIG; I'm not sure we want this. I think it implies that any RAO bits need to be cleared before calling this function, which could be inconvenient. Thanks, drew > + > + return 0; > +} > -- > 2.33.0.882.g93a45727a2-goog > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel