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[50.253.99.174]) by smtp.gmail.com with ESMTPSA id q7sm1133951ilv.48.2021.10.19.09.45.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 09:45:23 -0700 (PDT) From: Warner Losh To: qemu-devel@nongnu.org Subject: [PATCH 18/24] bsd-user/arm/target_arch_signal.h: arm machine context for signals Date: Tue, 19 Oct 2021 10:44:41 -0600 Message-Id: <20211019164447.16359-19-imp@bsdimp.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211019164447.16359-1-imp@bsdimp.com> References: <20211019164447.16359-1-imp@bsdimp.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: none client-ip=2607:f8b0:4864:20::132; envelope-from=imp@bsdimp.com; helo=mail-il1-x132.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stacey Son , qemu-trivial@nongnu.org, Klye Evans , Michael Tokarev , Laurent Vivier , Warner Losh Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Stacey Son Signed-off-by: Klye Evans Signed-off-by: Warner Losh --- bsd-user/arm/target_arch_signal.h | 36 +++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h index 973183d99c..9fee58ca9c 100644 --- a/bsd-user/arm/target_arch_signal.h +++ b/bsd-user/arm/target_arch_signal.h @@ -54,4 +54,40 @@ #define TARGET_MINSIGSTKSZ (1024 * 4) /* min sig stack size */ #define TARGET_SIGSTKSZ (TARGET_MINSIGSTKSZ + 32768) /* recommended size */ +/* arm/arm/machdep.c */ +struct target_sigcontext { + target_sigset_t sc_mask; /* signal mask to retstore */ + int32_t sc_onstack; /* sigstack state to restore */ + abi_long sc_pc; /* pc at time of signal */ + abi_long sc_reg[32]; /* processor regs 0 to 31 */ + abi_long mullo, mulhi; /* mullo and mulhi registers */ + int32_t sc_fpused; /* fp has been used */ + abi_long sc_fpregs[33]; /* fp regs 0 to 31 & csr */ + abi_long sc_fpc_eir; /* fp exception instr reg */ + /* int32_t reserved[8]; */ +}; + +typedef struct { + uint32_t __fp_fpsr; + struct { + uint32_t __fp_exponent; + uint32_t __fp_mantissa_hi; + uint32_t __fp_mantissa_lo; + } __fp_fr[8]; +} target__fpregset_t; + +typedef struct { + uint32_t __vfp_fpscr; + uint32_t __vfp_fstmx[33]; + uint32_t __vfp_fpsid; +} target__vfpregset_t; + +typedef struct target_mcontext { + uint32_t __gregs[TARGET__NGREG]; + union { + target__fpregset_t __fpregs; + target__vfpregset_t __vfpregs; + } __fpu; +} target_mcontext_t; + #endif /* !_TARGET_ARCH_SIGNAL_H_ */ -- 2.32.0