From: "Navare, Manasi" <manasi.d.navare@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 16/16] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE
Date: Wed, 20 Oct 2021 16:53:53 -0700 [thread overview]
Message-ID: <20211020235353.GB26429@labuser-Z97X-UD5H> (raw)
In-Reply-To: <20210913144440.23008-17-ville.syrjala@linux.intel.com>
On Mon, Sep 13, 2021 at 05:44:40PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Now that the bigjoiner state readout/computation has been
> made to do the right thing nuke the related state checker
> quirk.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 105 ++++++++----------
> .../drm/i915/display/intel_display_types.h | 1 -
> 2 files changed, 47 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 17d12d12bc0a..a6d1d6fbaeef 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8087,51 +8087,48 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_X(output_types);
>
> - /* FIXME do the readout properly and get rid of this quirk */
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
>
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
> - PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
> + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
>
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
>
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
> - PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
>
> - PIPE_CONF_CHECK_I(pixel_multiplier);
> + PIPE_CONF_CHECK_I(pixel_multiplier);
>
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_INTERLACE);
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_INTERLACE);
>
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_PHSYNC);
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_NHSYNC);
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_PVSYNC);
> - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> - DRM_MODE_FLAG_NVSYNC);
> - }
> + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_PHSYNC);
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_NHSYNC);
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_PVSYNC);
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> + DRM_MODE_FLAG_NVSYNC);
> }
>
> PIPE_CONF_CHECK_I(output_format);
> @@ -8143,9 +8140,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> PIPE_CONF_CHECK_BOOL(hdmi_scrambling);
> PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
> PIPE_CONF_CHECK_BOOL(has_infoframe);
> - /* FIXME do the readout properly and get rid of this quirk */
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
> - PIPE_CONF_CHECK_BOOL(fec_enable);
> + PIPE_CONF_CHECK_BOOL(fec_enable);
>
> PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
>
> @@ -8174,9 +8169,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> }
>
> PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> - /* FIXME do the readout properly and get rid of this quirk */
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
> - PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
> + PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
>
> PIPE_CONF_CHECK_X(gamma_mode);
> if (IS_CHERRYVIEW(dev_priv))
> @@ -8201,11 +8194,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_BOOL(double_wide);
>
> - if (dev_priv->dpll.mgr)
> + if (dev_priv->dpll.mgr) {
> PIPE_CONF_CHECK_P(shared_dpll);
>
> - /* FIXME do the readout properly and get rid of this quirk */
> - if (dev_priv->dpll.mgr && !PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
> PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
> PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
> PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
> @@ -8239,19 +8230,17 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
> }
>
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
> - PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> - PIPE_CONF_CHECK_X(dsi_pll.div);
> + PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> + PIPE_CONF_CHECK_X(dsi_pll.div);
>
> - if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
> - PIPE_CONF_CHECK_I(pipe_bpp);
> + if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
> + PIPE_CONF_CHECK_I(pipe_bpp);
>
> - PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
> - PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
> - PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
> + PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
> + PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
> + PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
>
> - PIPE_CONF_CHECK_I(min_voltage_level);
> - }
> + PIPE_CONF_CHECK_I(min_voltage_level);
>
> if (fastset && (current_config->has_psr || pipe_config->has_psr))
> PIPE_CONF_CHECK_X_WITH_MASK(infoframes.enable,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 7d852affead1..ee45fc3b1672 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -938,7 +938,6 @@ struct intel_crtc_state {
> * accordingly.
> */
> #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
> -#define PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE (1<<1) /* bigjoiner slave, partial readout */
> unsigned long quirks;
>
> unsigned fb_bits; /* framebuffers to flip */
> --
> 2.32.0
>
next prev parent reply other threads:[~2021-10-20 23:41 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-13 14:44 [Intel-gfx] [PATCH 00/16] drm/i915: Fix bigjoiner state readout Ville Syrjala
2021-09-13 14:44 ` [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes" Ville Syrjala
2021-09-13 16:28 ` Souza, Jose
2021-09-14 8:20 ` Ville Syrjälä
2021-09-14 23:24 ` Souza, Jose
2021-09-15 0:00 ` Souza, Jose
2021-09-15 12:30 ` Ville Syrjälä
2021-09-15 20:19 ` Souza, Jose
2021-09-16 13:21 ` Ville Syrjälä
2021-09-17 0:14 ` Souza, Jose
2021-09-13 14:44 ` [Intel-gfx] [PATCH 02/16] drm/i915: Disable all planes before modesetting any pipes Ville Syrjala
2021-09-20 7:52 ` Navare, Manasi
2021-09-21 12:49 ` Ville Syrjälä
2021-09-27 11:20 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 03/16] drm/i915: Extract intel_dp_use_bigjoiner() Ville Syrjala
2021-09-15 10:12 ` Jani Nikula
2021-09-15 15:39 ` Ville Syrjälä
2021-09-21 11:10 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 04/16] drm/i915: Flatten hsw_crtc_compute_clock() Ville Syrjala
2021-09-15 10:13 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 05/16] drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF Ville Syrjala
2021-09-15 10:16 ` Jani Nikula
2021-09-15 13:00 ` Ville Syrjälä
2021-09-15 13:17 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 06/16] drm/i915: Introduce with_intel_display_power_if_enabled() Ville Syrjala
2021-09-15 13:22 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 07/16] drm/i915: Adjust intel_dsc_power_domain() calling convention Ville Syrjala
2021-09-15 10:19 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 08/16] drm/i915: Extract hsw_panel_transcoders() Ville Syrjala
2021-09-15 10:20 ` Jani Nikula
2021-09-13 14:44 ` [Intel-gfx] [PATCH 09/16] drm/i915: Pimp HSW+ transcoder state readout Ville Syrjala
2021-09-21 11:46 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 10/16] drm/i915: Configure TRANSCONF just the once with bigjoiner Ville Syrjala
2021-09-21 11:51 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 11/16] drm/i915: Introduce intel_master_crtc() Ville Syrjala
2021-09-15 10:24 ` Jani Nikula
2021-09-15 12:21 ` Ville Syrjälä
2021-10-21 23:27 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 12/16] drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset() Ville Syrjala
2021-09-27 11:27 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 13/16] drm/i915: Split PPS write from DSC enable Ville Syrjala
2021-09-27 12:01 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 14/16] drm/i915: Perform correct cpu_transcoder readout for bigjoiner Ville Syrjala
2021-10-20 20:35 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 15/16] drm/i915: Reduce bigjoiner special casing Ville Syrjala
2021-10-20 23:52 ` Navare, Manasi
2021-09-13 14:44 ` [Intel-gfx] [PATCH 16/16] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE Ville Syrjala
2021-10-20 23:53 ` Navare, Manasi [this message]
2021-09-13 16:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix bigjoiner state readout Patchwork
2021-09-13 16:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-13 18:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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