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Thu, 21 Oct 2021 05:00:08 -0700 (PDT) Received: from skbuf ([188.25.174.251]) by smtp.gmail.com with ESMTPSA id nb42sm2587675ejc.23.2021.10.21.05.00.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 05:00:08 -0700 (PDT) Date: Thu, 21 Oct 2021 15:00:06 +0300 From: Vladimir Oltean To: Tom Rini , priyanka.jain@nxp.com Cc: Michael Walle , gaurav.jain@nxp.com, Shengzhou.Liu@nxp.com, V.Sethi@nxp.com, adrian.alonso@nxp.com, alison.wang@nxp.com, andy.tang@nxp.com, festevam@gmail.com, franck.lenormand@nxp.com, horia.geanta@nxp.com, ji.luo@nxp.com, meenakshi.aggarwal@nxp.com, mingkai.hu@nxp.com, pankaj.gupta@nxp.com, peng.fan@nxp.com, pramod.kumar_1@nxp.com, rajesh.bhagat@nxp.com, sahil.malhotra@nxp.com, sbabic@denx.de, silvano.dininno@nxp.com, sjg@chromium.org, u-boot@lists.denx.de, uboot-imx@nxp.com, wasim.khan@nxp.com, ye.li@nxp.com Subject: Re: [PATCH v3 12/16] Layerscape: Add crypto node in device tree Message-ID: <20211021120006.zjhi436umwhumjtl@skbuf> References: <20211005053929.9454-13-gaurav.jain@nxp.com> <20211021070742.1000710-1-michael@walle.cc> <20211021115046.GT7964@bill-the-cat> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211021115046.GT7964@bill-the-cat> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On Thu, Oct 21, 2021 at 07:50:46AM -0400, Tom Rini wrote: > On Thu, Oct 21, 2021 at 09:07:42AM +0200, Michael Walle wrote: > > Hi, > > > > > LS(1021/1012/1028/1043/1046/1088/2088), LX2160 - updated device tree > > > > > > Signed-off-by: Gaurav Jain > > > Reviewed-by: Priyanka Jain > > > --- > > > [..] > > > > > > diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi > > > index 50f9b527cd..c2a156ea8e 100644 > > > --- a/arch/arm/dts/fsl-ls1028a.dtsi > > > +++ b/arch/arm/dts/fsl-ls1028a.dtsi > > > @@ -2,7 +2,7 @@ > > > /* > > > * NXP ls1028a SOC common device tree source > > > * > > > - * Copyright 2019-2020 NXP > > > + * Copyright 2019-2021 NXP > > > > This will be removed again, because its not part of the kernel device tree. > > > > > * > > > */ > > > > > > @@ -123,6 +123,45 @@ > > > 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > > }; > > > > > > + crypto: crypto@8000000 { > > > + compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; > > > + fsl,sec-era = <10>; > > > + #address-cells = <1>; > > > + #size-cells = <1>; > > > + ranges = <0x0 0x00 0x8000000 0x100000>; > > > + reg = <0x00 0x8000000 0x0 0x100000>; > > > + interrupts = ; > > > + dma-coherent; > > > + > > > + sec_jr0: jr@10000 { > > > + compatible = "fsl,sec-v5.0-job-ring", > > > + "fsl,sec-v4.0-job-ring"; > > > + reg = <0x10000 0x10000>; > > > + interrupts = ; > > > + }; > > > + > > > + sec_jr1: jr@20000 { > > > + compatible = "fsl,sec-v5.0-job-ring", > > > + "fsl,sec-v4.0-job-ring"; > > > + reg = <0x20000 0x10000>; > > > + interrupts = ; > > > + }; > > > + > > > + sec_jr2: jr@30000 { > > > + compatible = "fsl,sec-v5.0-job-ring", > > > + "fsl,sec-v4.0-job-ring"; > > > + reg = <0x30000 0x10000>; > > > + interrupts = ; > > > + }; > > > + > > > + sec_jr3: jr@40000 { > > > + compatible = "fsl,sec-v5.0-job-ring", > > > + "fsl,sec-v4.0-job-ring"; > > > + reg = <0x40000 0x10000>; > > > + interrupts = ; > > > + }; > > > + }; > > > + > > > > While this one will collide with my DTB sync series [1]. I'd prefer > > to have my series merged first because then this patch will be unnecessary > > and I don't have to respin my series (yet again) because there were changes > > in the device tree in the meantime. > > > > [1] https://lore.kernel.org/u-boot/20211013161427.612033-1-michael@walle.cc/ > > Very much agreed with what Michael is saying here. Me too. Priyanka, could you please take a look at Michael's patches?