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Mon, 25 Oct 2021 14:34:33 +0800 (CST) X-IP-DOMAINF: 1 X-RL-SENDER: nico.cheng@rock-chips.com X-SENDER: nico.cheng@rock-chips.com X-LOGIN-NAME: nico.cheng@rock-chips.com X-FST-TO: sjg@chromium.org X-RCPT-COUNT: 10 X-LOCAL-RCPT-COUNT: 5 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-UNIQUE-TAG: <1c8a098b227a02c38f8158cae94f9b7d> X-System-Flag: 0 From: Nico Cheng To: sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com Cc: yamada.masahiro@socionext.com, chenjh@rock-chips.com, jason.zhu@rock-chips.com, trini@konsulko.com, yifeng.zhao@rock-chips.com, nico.cheng@rock-chips.com, u-boot@lists.denx.de Subject: [PATCH v2 1/3] rockchip: Kconfig: Enable SPL support for rk3568 Date: Mon, 25 Oct 2021 14:33:41 +0800 Message-Id: <20211025141454.v2.1.I06c6984e46cea818ace08a2ecec7015fe2dc4de1@changeid> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211025063343.29494-1-nico.cheng@rock-chips.com> References: <20211025063343.29494-1-nico.cheng@rock-chips.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Enable SPL support in Kconfig and add some related option in rk3568_common.h Signed-off-by: Nico Cheng Signed-off-by: Jason Zhu --- (no changes since v1) arch/arm/mach-rockchip/Kconfig | 2 ++ configs/evb-rk3568_defconfig | 25 ++++++++++++++++++++++++- include/configs/rk3568_common.h | 4 ++++ 3 files changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index b164afb529..21b9c381cf 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -260,6 +260,8 @@ config ROCKCHIP_RK3399 config ROCKCHIP_RK3568 bool "Support Rockchip RK3568" select ARM64 + select SUPPORT_SPL + select SPL select CLK select PINCTRL select RAM diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index a102a5a999..a145b71ac2 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -1,20 +1,42 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_TARGET_EVB_RK3568=y CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_CRC32_SUPPORT=y +CONFIG_SPL_ATF=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -28,6 +50,7 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index b6568917ea..47fc91779e 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -18,6 +18,10 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 #define CONFIG_SYS_LOAD_ADDR 0x00c00800 +#define CONFIG_SPL_STACK 0x00400000 +#define CONFIG_SPL_MAX_SIZE 0x20000 +#define CONFIG_SPL_BSS_START_ADDR 0x4000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x4000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #define CONFIG_SYS_SDRAM_BASE 0 -- 2.17.1