From: Gaurav Jain <gaurav.jain@nxp.com>
To: u-boot@lists.denx.de
Cc: Stefano Babic <sbabic@denx.de>,
Fabio Estevam <festevam@gmail.com>, Peng Fan <peng.fan@nxp.com>,
Simon Glass <sjg@chromium.org>,
Priyanka Jain <priyanka.jain@nxp.com>, Ye Li <ye.li@nxp.com>,
Horia Geanta <horia.geanta@nxp.com>, Ji Luo <ji.luo@nxp.com>,
Franck Lenormand <franck.lenormand@nxp.com>,
Silvano Di Ninno <silvano.dininno@nxp.com>,
Sahil malhotra <sahil.malhotra@nxp.com>,
Pankaj Gupta <pankaj.gupta@nxp.com>,
Varun Sethi <V.Sethi@nxp.com>,
"NXP i . MX U-Boot Team" <uboot-imx@nxp.com>,
Shengzhou Liu <Shengzhou.Liu@nxp.com>,
Mingkai Hu <mingkai.hu@nxp.com>,
Rajesh Bhagat <rajesh.bhagat@nxp.com>,
Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>,
Wasim Khan <wasim.khan@nxp.com>,
Alison Wang <alison.wang@nxp.com>,
Pramod Kumar <pramod.kumar_1@nxp.com>,
Tang Yuantian <andy.tang@nxp.com>,
Adrian Alonso <adrian.alonso@nxp.com>,
Vladimir Oltean <olteanv@gmail.com>,
Gaurav Jain <gaurav.jain@nxp.com>
Subject: [PATCH v4 04/16] crypto/fsl: i.MX8M: Enable Job ring driver model in SPL and U-Boot.
Date: Tue, 26 Oct 2021 12:25:42 +0530 [thread overview]
Message-ID: <20211026065554.29009-5-gaurav.jain@nxp.com> (raw)
In-Reply-To: <20211026065554.29009-1-gaurav.jain@nxp.com>
i.MX8MM/MN/MP/MQ - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
---
arch/arm/Kconfig | 2 +-
arch/arm/include/asm/arch-imx8m/imx-regs.h | 1 +
arch/arm/mach-imx/imx8m/Kconfig | 23 ++++++++++++++++++++++
arch/arm/mach-imx/imx8m/soc.c | 10 +++++++++-
board/freescale/imx8mm_evk/spl.c | 9 ++++++++-
board/freescale/imx8mn_evk/spl.c | 8 ++++++--
board/freescale/imx8mp_evk/spl.c | 13 ++++++++++--
board/freescale/imx8mq_evk/spl.c | 9 +++++++--
drivers/crypto/fsl/jr.c | 14 ++++++++++---
scripts/config_whitelist.txt | 1 +
10 files changed, 78 insertions(+), 12 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 02f8306f15..5791d7c293 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -817,7 +817,7 @@ config ARCH_IMX8M
select ARM64
select GPIO_EXTRA_HEADER
select MACH_IMX
- select SYS_FSL_HAS_SEC if IMX_HAB
+ select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select SYS_I2C_MXC
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index b800da13a1..ff8de53f67 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -72,6 +72,7 @@
#define CONFIG_SYS_FSL_SEC_ADDR (CAAM_IPS_BASE_ADDR + \
CONFIG_SYS_FSL_SEC_OFFSET)
#define CONFIG_SYS_FSL_JR0_OFFSET (0x1000)
+#define CONFIG_SYS_FSL_JR1_OFFSET (0x2000)
#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_FSL_SEC_ADDR + \
CONFIG_SYS_FSL_JR0_OFFSET)
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 276b8bd974..4988171d2b 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -38,6 +38,11 @@ config TARGET_IMX8MQ_EVK
bool "imx8mq_evk"
select IMX8MQ
select IMX8M_LPDDR4
+ select FSL_CAAM
+ select FSL_BLOB
+ select MISC
+ select ARCH_MISC_INIT
+ select SPL_CRYPTO if SPL
config TARGET_IMX8MQ_PHANBELL
bool "imx8mq_phanbell"
@@ -50,6 +55,11 @@ config TARGET_IMX8MM_EVK
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
+ select FSL_CAAM
+ select FSL_BLOB
+ select MISC
+ select ARCH_MISC_INIT
+ select SPL_CRYPTO if SPL
config TARGET_IMX8MM_ICORE_MX8MM
bool "Engicam i.Core MX8M Mini SOM"
@@ -88,6 +98,10 @@ config TARGET_IMX8MN_EVK
select IMX8MN
select SUPPORT_SPL
select IMX8M_LPDDR4
+ select FSL_CAAM
+ select FSL_BLOB
+ select MISC
+ select SPL_CRYPTO if SPL
config TARGET_IMX8MN_DDR4_EVK
bool "imx8mn DDR4 EVK board"
@@ -95,6 +109,10 @@ config TARGET_IMX8MN_DDR4_EVK
select IMX8MN
select SUPPORT_SPL
select IMX8M_DDR4
+ select FSL_CAAM
+ select FSL_BLOB
+ select MISC
+ select SPL_CRYPTO if SPL
config TARGET_IMX8MP_EVK
bool "imx8mp LPDDR4 EVK board"
@@ -102,6 +120,11 @@ config TARGET_IMX8MP_EVK
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
+ select FSL_CAAM
+ select FSL_BLOB
+ select MISC
+ select ARCH_MISC_INIT
+ select SPL_CRYPTO if SPL
config TARGET_PICO_IMX8MQ
bool "Support Technexion Pico iMX8MQ"
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 863508776d..0f9bd77354 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2017-2019 NXP
+ * Copyright 2017-2019, 2021 NXP
*
* Peng Fan <peng.fan@nxp.com>
*/
@@ -20,6 +20,7 @@
#include <asm/ptrace.h>
#include <asm/armv8/mmu.h>
#include <dm/uclass.h>
+#include <dm/device.h>
#include <efi_loader.h>
#include <env.h>
#include <env_internal.h>
@@ -1197,6 +1198,13 @@ static void acquire_buildinfo(void)
int arch_misc_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
+ if (ret)
+ printf("Failed to initialize %s: %d\n", dev->name, ret);
+
acquire_buildinfo();
return 0;
diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index 4ef7f6f180..c81128f442 100644
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2019 NXP
+ * Copyright 2019, 2021 NXP
*/
#include <common.h>
@@ -51,6 +51,13 @@ static void spl_dram_init(void)
void spl_board_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
+ if (ret)
+ printf("Failed to initialize %s: %d\n", dev->name, ret);
+
puts("Normal Boot\n");
}
diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
index 03f2a56e80..ab19dabf7b 100644
--- a/board/freescale/imx8mn_evk/spl.c
+++ b/board/freescale/imx8mn_evk/spl.c
@@ -1,7 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2019, 2021 NXP
*
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@@ -49,6 +49,10 @@ void spl_board_init(void)
struct udevice *dev;
int ret;
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
+ if (ret)
+ printf("Failed to initialize %s: %d\n", dev->name, ret);
+
puts("Normal Boot\n");
ret = uclass_get_device_by_name(UCLASS_CLK,
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index eca42c756e..bcef96caa3 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -1,7 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2019, 2021 NXP
*
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@@ -20,6 +20,8 @@
#include <asm/arch/ddr.h>
#include <power/pmic.h>
#include <power/pca9450.h>
+#include <dm/uclass.h>
+#include <dm/device.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -35,6 +37,13 @@ void spl_dram_init(void)
void spl_board_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
+ if (ret)
+ printf("Failed to initialize %s: %d\n", dev->name, ret);
+
/*
* Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does
* not allow to change it. Should set the clock after PMIC
diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c
index 67d069b2b0..8a47dd01a5 100644
--- a/board/freescale/imx8mq_evk/spl.c
+++ b/board/freescale/imx8mq_evk/spl.c
@@ -1,8 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2018 NXP
+ * Copyright 2018, 2021 NXP
*
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@@ -22,6 +21,7 @@
#include <asm/mach-imx/gpio.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <fsl_esdhc_imx.h>
+#include <fsl_sec.h>
#include <mmc.h>
#include <linux/delay.h>
#include <power/pmic.h>
@@ -199,6 +199,11 @@ int power_init_board(void)
void spl_board_init(void)
{
+#ifdef CONFIG_FSL_CAAM
+ if (sec_init())
+ printf("\nsec_init failed!\n");
+
+#endif
puts("Normal Boot\n");
}
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index bec4953f6d..69804dc1df 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -43,9 +43,17 @@ struct udevice *caam_dev;
#define SEC_ADDR(idx) \
(ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx]))
-#define SEC_JR0_ADDR(idx) \
+#ifndef CONFIG_IMX8M
+#define SEC_JR_ADDR(idx) \
(ulong)(SEC_ADDR(idx) + \
(CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET))
+#define JR_ID 0
+#else
+#define SEC_JR_ADDR(idx) \
+ (ulong)(SEC_ADDR(idx) + \
+ (CONFIG_SYS_FSL_JR1_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET))
+#define JR_ID 1
+#endif
struct caam_regs caam_st;
#endif
@@ -675,8 +683,8 @@ int sec_init_idx(uint8_t sec_idx)
caam = dev_get_priv(caam_dev);
#else
caam_st.sec = (void *)SEC_ADDR(sec_idx);
- caam_st.regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx);
- caam_st.jrid = 0;
+ caam_st.regs = (struct jr_regs *)SEC_JR_ADDR(sec_idx);
+ caam_st.jrid = JR_ID;
caam = &caam_st;
#endif
#ifndef CONFIG_ARCH_IMX8
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 022a27288c..d3b96f72ca 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1853,6 +1853,7 @@ CONFIG_SYS_FSL_IFC_SIZE2
CONFIG_SYS_FSL_ISBC_VER
CONFIG_SYS_FSL_JR0_ADDR
CONFIG_SYS_FSL_JR0_OFFSET
+CONFIG_SYS_FSL_JR1_OFFSET
CONFIG_SYS_FSL_LS1_CLK_ADDR
CONFIG_SYS_FSL_LSCH3_SERDES_ADDR
CONFIG_SYS_FSL_MAX_NUM_OF_SEC
--
2.17.1
next prev parent reply other threads:[~2021-10-26 6:57 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-26 6:55 [PATCH v4 00/16] Add CAAM driver model support Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 01/16] crypto/fsl: Add support for CAAM Job ring driver model Gaurav Jain
2021-11-02 14:55 ` Simon Glass
2021-11-08 9:30 ` [EXT] " Gaurav Jain
2021-11-25 0:12 ` Simon Glass
2021-11-29 7:25 ` Gaurav Jain
2021-12-01 6:26 ` Simon Glass
2021-12-01 12:13 ` Gaurav Jain
2021-12-01 18:02 ` Simon Glass
2021-12-06 5:32 ` Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 02/16] crypto/fsl: Add CAAM support for bkek, random number generation Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 03/16] i.MX8M: crypto: updated device tree for supporting DM in SPL Gaurav Jain
2021-11-01 13:00 ` Adam Ford
2021-11-02 8:17 ` [EXT] " Gaurav Jain
2021-11-02 11:19 ` Adam Ford
2021-11-03 11:34 ` ZHIZHIKIN Andrey
2021-11-08 8:20 ` Gaurav Jain
2021-11-08 8:48 ` ZHIZHIKIN Andrey
2021-11-08 8:58 ` Michael Walle
2021-11-15 7:09 ` Gaurav Jain
2021-10-26 6:55 ` Gaurav Jain [this message]
2021-10-26 6:55 ` [PATCH v4 05/16] mx6sabre: Remove unnecessary SPL configs Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 06/16] i.MX6: Enable Job ring driver model in U-Boot Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 07/16] i.MX7: " Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 08/16] i.MX7ULP: " Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 09/16] i.MX8: Add crypto node in device tree Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 10/16] crypto/fsl: i.MX8: Enable Job ring driver model in SPL and U-Boot Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 11/16] crypto/fsl: Fix kick_trng Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 12/16] Layerscape: Add crypto node in device tree Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 13/16] Layerscape: Enable Job ring driver model in U-Boot Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 14/16] PPC: Add crypto node in device tree Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 15/16] PPC: Enable Job ring driver model in U-Boot Gaurav Jain
2021-10-26 6:55 ` [PATCH v4 16/16] update CAAM MAINTAINER Gaurav Jain
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