From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E79E5C433EF for ; Wed, 27 Oct 2021 14:23:53 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4DBAF60F38 for ; Wed, 27 Oct 2021 14:23:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 4DBAF60F38 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 406B6835BE; Wed, 27 Oct 2021 16:23:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=linux.intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 1057E835BE; Wed, 27 Oct 2021 16:23:49 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3CCCB835A8 for ; Wed, 27 Oct 2021 16:23:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=linux.intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=andriy.shevchenko@linux.intel.com X-IronPort-AV: E=McAfee;i="6200,9189,10150"; a="253722493" X-IronPort-AV: E=Sophos;i="5.87,186,1631602800"; d="scan'208";a="253722493" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2021 07:23:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,186,1631602800"; d="scan'208";a="572958354" Received: from black.fi.intel.com ([10.237.72.28]) by FMSMGA003.fm.intel.com with ESMTP; 27 Oct 2021 07:23:41 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 358FFBB; Wed, 27 Oct 2021 17:23:41 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , u-boot@lists.denx.de Cc: Simon Glass , Bin Meng Subject: [PATCH v1 2/2] x86: tangier: pinmux: Move error message to the caller Date: Wed, 27 Oct 2021 17:23:38 +0300 Message-Id: <20211027142338.77161-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211027142338.77161-1-andriy.shevchenko@linux.intel.com> References: <20211027142338.77161-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Move error message to the caller of mrfld_pinconfig*() in order to unify them in the future. Signed-off-by: Andy Shevchenko --- arch/x86/cpu/tangier/pinmux.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c index 883860f75e28..7b2c35fbf794 100644 --- a/arch/x86/cpu/tangier/pinmux.c +++ b/arch/x86/cpu/tangier/pinmux.c @@ -117,13 +117,7 @@ static int mrfld_pinconfig_protected(unsigned int pin, u32 mask, u32 bits) debug("scu: v: 0x%x p: 0x%x bits: %d, mask: %d bufcfg: 0x%p\n", v, (u32)bufcfg, bits, mask, bufcfg); - ret = scu_ipc_raw_command(IPCMSG_INDIRECT_WRITE, 0, &v, 4, - NULL, 0, (u32)bufcfg, 0); - if (ret) - pr_err("Failed to set mode via SCU for pin %u (%d)\n", - pin, ret); - - return ret; + return scu_ipc_raw_command(IPCMSG_INDIRECT_WRITE, 0, &v, 4, NULL, 0, (u32)bufcfg, 0); } static int mrfld_pinconfig(unsigned int pin, u32 mask, u32 bits) @@ -181,6 +175,8 @@ static int mrfld_pinctrl_cfg_pin(ofnode pin_node) ret = mrfld_pinconfig_protected(pad_offset, mask, mode); else ret = mrfld_pinconfig(pad_offset, mask, mode); + if (ret) + pr_err("Failed to set mode for pin %u (%d)\n", pad_offset, ret); return ret; } -- 2.33.0