From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A110AC433EF for ; Sat, 6 Nov 2021 11:16:55 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C53A361054 for ; Sat, 6 Nov 2021 11:16:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C53A361054 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2450583457; Sat, 6 Nov 2021 12:16:53 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="B1XRxq2o"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 635368331E; Sat, 6 Nov 2021 12:16:51 +0100 (CET) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 73DC983457 for ; Sat, 6 Nov 2021 12:16:47 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: by mail.kernel.org (Postfix) with ESMTPSA id DCC75611AE; Sat, 6 Nov 2021 11:16:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1636197406; bh=3zGnd2luPkf/DxQrn3dhCF55oPbvrzcCMEPT/IYeKQU=; h=From:To:Cc:Subject:Date:From; b=B1XRxq2oOELeHzDeACYVQVEW2jZRSeN5jpP8ccWT3GdlGVQg16OMPae0ZiU7NXcQg i8kRKq/dZCngkxHmF57DfeAxOsDIkM+CaI2Qfy6pKcCmIhz0qFwC9NE5xAwBiIxC5A R/GbLkE9VLnzm8HJ2DMoRWmRfYXStBe7NLt9kyH9VNuEYBX7KlmaqVEFyAn1W7kHPx 0XhZkY+4LCfjOfjQexZhCN4XvBwBjap6vOTEmp54SuzzXsVgPpxGAaW9qcJzTXiazT mC8VEwNw8ib2Ow1vEjxOU5bpbdyNkYHglffGoveOVWmLkf9eKAKqY+J0p0YL36yugu w8Q8MhJUu18xw== Received: by pali.im (Postfix) id 8E232775; Sat, 6 Nov 2021 12:16:43 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese Cc: u-boot@lists.denx.de Subject: [PATCH] pci: pci_mvebu: Use global MBUS_PCI_MEM_SIZE macro Date: Sat, 6 Nov 2021 12:16:12 +0100 Message-Id: <20211106111612.29267-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Header file mach/cpu.h already defines MBUS_PCI_MEM_SIZE macro which defines size of MBUS_PCI_MEM_BASE window. So use global MBUS_PCI_MEM_SIZE macro instead of locally defined PCIE_MEM_SIZE macro. Both macros have same definition. Signed-off-by: Pali Rohár --- drivers/pci/pci_mvebu.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index c575e9412b2a..14cd82db6ff8 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -97,7 +97,6 @@ struct mvebu_pcie { * and 64K of I/O space when registered. */ static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE; -#define PCIE_MEM_SIZE (128 << 20) static void __iomem *mvebu_pcie_iobase = (void __iomem *)MBUS_PCI_IO_BASE; static inline bool mvebu_pcie_link_up(struct mvebu_pcie *pcie) @@ -433,14 +432,14 @@ static int mvebu_pcie_probe(struct udevice *dev) mvebu_pcie_set_local_dev_nr(pcie, 1); pcie->mem.start = (u32)mvebu_pcie_membase; - pcie->mem.end = pcie->mem.start + PCIE_MEM_SIZE - 1; - mvebu_pcie_membase += PCIE_MEM_SIZE; + pcie->mem.end = pcie->mem.start + MBUS_PCI_MEM_SIZE - 1; + mvebu_pcie_membase += MBUS_PCI_MEM_SIZE; if (mvebu_mbus_add_window_by_id(pcie->mem_target, pcie->mem_attr, (phys_addr_t)pcie->mem.start, - PCIE_MEM_SIZE)) { + MBUS_PCI_MEM_SIZE)) { printf("PCIe unable to add mbus window for mem at %08x+%08x\n", - (u32)pcie->mem.start, PCIE_MEM_SIZE); + (u32)pcie->mem.start, MBUS_PCI_MEM_SIZE); } pcie->io.start = (u32)mvebu_pcie_iobase; @@ -459,7 +458,7 @@ static int mvebu_pcie_probe(struct udevice *dev) /* PCI memory space */ pci_set_region(hose->regions + 0, pcie->mem.start, - pcie->mem.start, PCIE_MEM_SIZE, PCI_REGION_MEM); + pcie->mem.start, MBUS_PCI_MEM_SIZE, PCI_REGION_MEM); pci_set_region(hose->regions + 1, 0, 0, gd->ram_size, -- 2.20.1