From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5330C433F5 for ; Tue, 9 Nov 2021 07:03:17 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1F3926117A for ; Tue, 9 Nov 2021 07:03:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1F3926117A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6EAA5838EF; Tue, 9 Nov 2021 08:02:48 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="S1+RWXkg"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 04234836F8; Tue, 9 Nov 2021 08:02:39 +0100 (CET) Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 80224836B4 for ; Tue, 9 Nov 2021 08:02:34 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ilias.apalodimas@linaro.org Received: by mail-wr1-x431.google.com with SMTP id s13so31213885wrb.3 for ; Mon, 08 Nov 2021 23:02:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vEKAopS+Fo2OmqoXy+6BbqTUkmOJU/7ImTKwHy3zLq4=; b=S1+RWXkgB/bGwnLbO00c00Oly1mOohKRS5fuME7IeVXO0SsRQlIPfI/+QbYtk0Fiau kNFa+q3+XsCOBrTrnqwKP0NJpfmpprgg+mN4sR345iZrB01KcRizEsKCK/jvD3KCp2ie n41BWFsoRHtQeZ0H455m6NAvueRXF6z7wsWsR+FmcoUdHVclDjr93Y54qm3TVq8BAHcF WSVnGpdEdvRz4rVaVEsslBFSknghNevoPQPQ+YqnOmxyMCL8D+eaf8rNGJbqjuxBayGI ZgdMdDAC51+Uqp5FKjBRg74p3Bc6Q7UWeY9P3CskNz6aosqSrMxOP6M9ULTWcAbBE58a w1KA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vEKAopS+Fo2OmqoXy+6BbqTUkmOJU/7ImTKwHy3zLq4=; b=40smgDGcUabY49nmzTwzR/Kv5wJELNJbO5Cc1gb/iQ6E5i8FSrzR9jeTYliQreU7td cVD9RD6DsYQS0eLfGYtteuj8se/KW53QAWm0qMAi/UTkeJWcN8RdYEYLkdfoPDFZbF/N xXu7Ts/s0UMvsi0DjKsxrazDnQMatgB1GDjaWtvKm7jfYDjM2Ou7bcgRn9Vz1ZiWVPDz anedg3pyjjed3yTCfhopXdbMgXckKz3AvUHYKAH8UzqcfgBeKy633T8vhUzj++0tyUhe O5WeNWIUWe0I++TsAN4SneibgRVmBFZao9Vbf99gdWzRZsTqFWvl4mLQmeAfPD9uBNjR lGbA== X-Gm-Message-State: AOAM530KS2DJ3oVni+QmP8X+OJjEZceN1XPSs6eb6PfQ9XFgqdlwwbdS 2n/cff3wV7UgX5OKhtHu1AAD9kkiwFoK+A== X-Google-Smtp-Source: ABdhPJwnRZcbviByq+QA5dE4YikkbRYIZMwgNjPFsEWL+HOOiKjkkk3y+JRi1Y1QiewObMz5nPtMrg== X-Received: by 2002:a5d:47a9:: with SMTP id 9mr6629318wrb.42.1636441354083; Mon, 08 Nov 2021 23:02:34 -0800 (PST) Received: from apalos.home ([2a02:587:4627:18c0:2e56:dcff:fe9a:8f06]) by smtp.gmail.com with ESMTPSA id g5sm20897229wri.45.2021.11.08.23.02.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Nov 2021 23:02:33 -0800 (PST) From: Ilias Apalodimas To: u-boot@lists.denx.de Cc: trini@konsulko.com, Ilias Apalodimas , Simon Glass , Rick Chen , Sean Anderson , Masahisa Kojima , Heinrich Schuchardt Subject: [PATCH 4/8 v7] tpm2: Add a TPMv2 MMIO TIS driver Date: Tue, 9 Nov 2021 09:02:18 +0200 Message-Id: <20211109070223.76456-5-ilias.apalodimas@linaro.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211109070223.76456-1-ilias.apalodimas@linaro.org> References: <20211109070223.76456-1-ilias.apalodimas@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Add support for devices that expose a TPMv2 though MMIO. Apart from those devices, we can use the driver in our QEMU setups and test TPM related code which is difficult to achieve using the sandbox driver (e.g test the EFI TCG2 protocol). It's worth noting that a previous patch added TPMv2 TIS core functions, which the current driver is consuming. Reviewed-by: Simon Glass Signed-off-by: Ilias Apalodimas --- drivers/tpm/Kconfig | 9 +++ drivers/tpm/Makefile | 1 + drivers/tpm/tpm2_tis_mmio.c | 157 ++++++++++++++++++++++++++++++++++++ 3 files changed, 167 insertions(+) create mode 100644 drivers/tpm/tpm2_tis_mmio.c diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig index 9eebab5cfd90..406ee8716e1e 100644 --- a/drivers/tpm/Kconfig +++ b/drivers/tpm/Kconfig @@ -161,6 +161,15 @@ config TPM2_FTPM_TEE help This driver supports firmware TPM running in TEE. +config TPM2_MMIO + bool "MMIO based TPM2 Interface" + depends on TPM_V2 + help + This driver supports firmware TPM2.0 MMIO interface. + The usual TPM operations and the 'tpm' command can be used to talk + to the device using the standard TPM Interface Specification (TIS) + protocol. + endif # TPM_V2 endmenu diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index c65be5267002..494aa5a46d30 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -14,3 +14,4 @@ obj-$(CONFIG_$(SPL_TPL_)TPM2_CR50_I2C) += cr50_i2c.o obj-$(CONFIG_TPM2_TIS_SANDBOX) += tpm2_tis_sandbox.o sandbox_common.o obj-$(CONFIG_TPM2_TIS_SPI) += tpm2_tis_spi.o obj-$(CONFIG_TPM2_FTPM_TEE) += tpm2_ftpm_tee.o +obj-$(CONFIG_TPM2_MMIO) += tpm2_tis_core.o tpm2_tis_mmio.o diff --git a/drivers/tpm/tpm2_tis_mmio.c b/drivers/tpm/tpm2_tis_mmio.c new file mode 100644 index 000000000000..9cedff222503 --- /dev/null +++ b/drivers/tpm/tpm2_tis_mmio.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * driver for mmio TCG/TIS TPM (trusted platform module). + * + * Specifications at www.trustedcomputinggroup.org + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "tpm_tis.h" +#include "tpm_internal.h" + +/** + * struct tpm_tis_chip_data - Information about an MMIO TPM + * @pcr_count: Number of PCR per bank + * @pcr_select_min: Minimum size in bytes of the pcrSelect array + * @iobase: Base address + */ +struct tpm_tis_chip_data { + unsigned int pcr_count; + unsigned int pcr_select_min; + void __iomem *iobase; +}; + +static int mmio_read_bytes(struct udevice *dev, u32 addr, u16 len, + u8 *result) +{ + struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev); + + while (len--) + *result++ = ioread8(drv_data->iobase + addr); + + return 0; +} + +static int mmio_write_bytes(struct udevice *dev, u32 addr, u16 len, + const u8 *value) +{ + struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev); + + while (len--) + iowrite8(*value++, drv_data->iobase + addr); + + return 0; +} + +static int mmio_read32(struct udevice *dev, u32 addr, u32 *result) +{ + struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev); + + *result = ioread32(drv_data->iobase + addr); + + return 0; +} + +static int mmio_write32(struct udevice *dev, u32 addr, u32 value) +{ + struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev); + + iowrite32(value, drv_data->iobase + addr); + + return 0; +} + +static struct tpm_tis_phy_ops phy_ops = { + .read_bytes = mmio_read_bytes, + .write_bytes = mmio_write_bytes, + .read32 = mmio_read32, + .write32 = mmio_write32, +}; + +static int tpm_tis_probe(struct udevice *dev) +{ + struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev); + struct tpm_chip_priv *priv = dev_get_uclass_priv(dev); + int ret = 0; + fdt_addr_t ioaddr; + u64 sz; + + ioaddr = dev_read_addr(dev); + if (ioaddr == FDT_ADDR_T_NONE) + return log_msg_ret("ioaddr", -EINVAL); + + ret = dev_read_u64(dev, "reg", &sz); + if (ret) + return -EINVAL; + + drv_data->iobase = ioremap(ioaddr, sz); + tpm_tis_ops_register(dev, &phy_ops); + ret = tpm_tis_init(dev); + if (ret) + goto iounmap; + + priv->pcr_count = drv_data->pcr_count; + priv->pcr_select_min = drv_data->pcr_select_min; + /* + * Although the driver probably works with a TPMv1 our Kconfig + * limits the driver to TPMv2 only + */ + priv->version = TPM_V2; + + return ret; +iounmap: + iounmap(drv_data->iobase); + + return -EINVAL; +} + +static int tpm_tis_remove(struct udevice *dev) +{ + struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev); + + iounmap(drv_data->iobase); + + return tpm_tis_cleanup(dev); +} + +static const struct tpm_ops tpm_tis_ops = { + .open = tpm_tis_open, + .close = tpm_tis_close, + .get_desc = tpm_tis_get_desc, + .send = tpm_tis_send, + .recv = tpm_tis_recv, + .cleanup = tpm_tis_cleanup, +}; + +static const struct tpm_tis_chip_data tpm_tis_std_chip_data = { + .pcr_count = 24, + .pcr_select_min = 3, +}; + +static const struct udevice_id tpm_tis_ids[] = { + { + .compatible = "tcg,tpm-tis-mmio", + .data = (ulong)&tpm_tis_std_chip_data, + }, + { } +}; + +U_BOOT_DRIVER(tpm_tis_mmio) = { + .name = "tpm_tis_mmio", + .id = UCLASS_TPM, + .of_match = tpm_tis_ids, + .ops = &tpm_tis_ops, + .probe = tpm_tis_probe, + .remove = tpm_tis_remove, + .priv_auto = sizeof(struct tpm_chip), +}; -- 2.33.1