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[82.11.186.48]) by smtp.gmail.com with ESMTPSA id a22sm3452736wme.19.2021.11.09.12.42.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Nov 2021 12:42:51 -0800 (PST) Date: Tue, 9 Nov 2021 20:42:49 +0000 From: Leif Lindholm To: Peter Maydell Subject: Re: [PATCH v8 07/10] hw/arm/sbsa-ref: add ITS support in SBSA GIC Message-ID: <20211109204249.usvfatm3frar3u7a@leviathan> References: <20210812165341.40784-1-shashi.mallela@linaro.org> <20210812165341.40784-8-shashi.mallela@linaro.org> <20210902124258.mqjhx7lqqvkczf6a@leviathan> <20211015122351.vc55mwzjbevl6wjy@leviathan> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::330 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=leif@nuviainc.com; helo=mail-wm1-x330.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcin Juszkiewicz , "Michael S. Tsirkin" , Shashi Mallela , Radoslaw Biernacki , QEMU Developers , narmstrong@baylibre.com, Eric Auger , qemu-arm , Igor Mammedov , Alex =?utf-8?Q?Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, Nov 09, 2021 at 13:43:50 +0000, Peter Maydell wrote: > On Fri, 15 Oct 2021 at 13:23, Leif Lindholm wrote: > > (Apologies for delay. Alex also tells me you are currently away, but > > there is no strong urgency here.) > > (Thanks for the ping via Alex -- I missed this email when I was > scanning through my qemu-devel mail backlog after my holiday...) > > > On Thu, Sep 23, 2021 at 17:00:35 +0100, Peter Maydell wrote: > > > Leif, what's your plan/preferences here ? > > > > I discussed this with Alex/Shashi. > > > > One further complicating aspect is that the EDK2 GIC driver currently > > relies on GIC addresses being known at compile-time. > > > > > Presumably somebody also needs to do the system-software side > > > of things to handle the ITS being present and the redistributor > > > frames moving... > > > > Since it *would* be useful to get this support in, I think the most > > pragmatic plan would be: > > - Add ITS in the location originally proposed by Shashi. > > - Add information to DT: > > - Platform version (1). > > - GICD, GICR, and ITS base addresses. > > - edk2: Convert GIC driver to support dynamic block addresses. > > - TF-A: Parse the DT and add SIP SVC calls: > > - to retrieve it (or return not supported if not found). > > - to retrieve base addresses for GICD, GICR, and ITS. > > - edk2-platforms: Query TF-A for platform version. > > If platform version >= 1, request base addresses for GICD, GICR, and > > ITS. > > - Generate IORT if ITS present. > > - Update GIC frame layout to match an ARM GIC-?00. (Platform version 2) > > > > Unrelated to the ITS question, and not requiring any intervention on > > the QEMU side, we can then also transition the CPU and DRAM discovery > > to SIP SVC calls, and stop sharing the DT with edk2 completely. > > > > And some way further down the line we could do the SCP thing, which > > would let us support different GIC-layouts/configurations based on > > platform command line options. (Platform version 3.) > > (TF-A makes SCP calls if version >= 3) > > This would then require no changes to edk2-platforms. > > This sounds good to me. > > > (Numeric values described as incrementing integer rather than trying > > to guess at specific qemu release numbers.) > > This is kind of mixing up two separate things. The above describes > three "versions" of this machine type, which you might consider > as like revision A/B/C of hardware (and where firmware might for > instance read a 'board revision' register or something to tell > them apart). QEMU release numbers and versioned board types like virt-6.0 > are a very specific thing that is taking on a guarantee about > maintaining version compatibility of the same board type between > different QEMU versions. We can make sbsa-ref a versioned machine > type in that sense if you really want to do it, but it makes future > changes to the machine rather more painful (everything new > immediately needs flags and properties and so on so that it can be > added only for newer versions of the machine type and not for the > old one -- at a rough count at least 10% of hw/arm/virt.c is purely > boilerplate and machinery for versioned machine types). > So it's not something we should do for sbsa-ref unless we have a good > reason I think. Hmm, right. So you're thinking containing the versioning fully in the interfaces presented by the model: - Is the version node present? - If so, is it greater than X? - If so, is it great enough to support the SCP interface? And let the firmware deal with that? I was kind of thinking it was expected for incompatible machine versions to be qemu versioned. But I'm good with skipping that bit if it's not. / Leif