From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46051C433F5 for ; Mon, 15 Nov 2021 18:16:08 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BAB8D633DC for ; Mon, 15 Nov 2021 18:16:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org BAB8D633DC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 44FF48378D; Mon, 15 Nov 2021 19:16:04 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="cRonoVCH"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2E05A83767; Mon, 15 Nov 2021 19:16:01 +0100 (CET) Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7633D8378D for ; Mon, 15 Nov 2021 19:15:57 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=michael@amarulasolutions.com Received: by mail-ed1-x529.google.com with SMTP id m20so30036902edc.5 for ; Mon, 15 Nov 2021 10:15:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=KBWhebpyINUBNbC8rNJvqtpeRn3etxk/c+jk/zZe3Vg=; b=cRonoVCHlCEUWMP/o1SQvhVS14QaqnRKcGqBwHNE1+x8IcL75iuK7Ak/81D56LU8JC c0Sp8+9hudseBVAb06kcMwcyJQMPsmEFaMq7MpNai4JtbZqqPWWu4q9hdMz2kLBFDt4t ppqNcTO9Mr7tj3iu3l9PJOOebfYkqiooGAxmU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=KBWhebpyINUBNbC8rNJvqtpeRn3etxk/c+jk/zZe3Vg=; b=ZyeI6Q1J5wRIrbhh7UhviAiTjsFLcif959HIH60bwTL7aTCLjUkFk4GtTBi4/YCs8k j2DzEx5qsJMDFEnNU34J85+rbx0aO0DlxIA7KK9bVNlfwkKaowb2mCseEpbkTJMxHofq nDKEorSz10oT/LrxlHWf9AQIXt+ZkKh89UvqReZRPILuB/VtrHo5QWJEmAI1jKEhe8MD 2E7GjF8nMV92FNtY1/DR2OUe10i3tVgoi9nrSpd2tkKc06KLsRYbEN+r/MCiKlcE5Tca RrHpmVil6a7JBEJ4wM2FmPDtpsuSJe01UCQkTxTEILcAJAdYKwqoA1tKSHrwLDP3Cgp3 cNuA== X-Gm-Message-State: AOAM531qO9+0QoZULaPng7kRqWThlIke9XWhubGvlVIQS685UBw6lANT 8esnCE6X2orl/OhCJAHs9GInAg== X-Google-Smtp-Source: ABdhPJw86tCHgbmzMaFRERIq3IyHAFyND/IHFuTHxo4QuRATmNJ3kV0cVRCqwbPO+oHCVY7SNBDVLA== X-Received: by 2002:a50:da06:: with SMTP id z6mr886137edj.355.1637000156733; Mon, 15 Nov 2021 10:15:56 -0800 (PST) Received: from panicking.amarulasolutions.com ([2.196.210.5]) by smtp.gmail.com with ESMTPSA id e12sm6935089ejs.86.2021.11.15.10.15.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Nov 2021 10:15:56 -0800 (PST) From: Michael Trimarchi To: Ye Li , Stefano Babic , Fabio Estevam Cc: u-boot@lists.denx.de, Ariel D'Alessandro , linux-amarula@amarulasolutions.com, Anthony Brandon Subject: [PATCH] cmd_nandbcb: Support secondary boot address of imx8mn Date: Mon, 15 Nov 2021 19:15:52 +0100 Message-Id: <20211115181553.74830-1-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.35 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Add support of secondary boot address for imx8mn. The secondary boot address is hardcoded in the fuse. The value is calculated from there according to the algo. The fuse IMG_CNTN_SET1_OFFSET (0x490[22:19]) is defined as follows: • Secondary boot is disabled if fuse value is bigger than 10, n = fuse value bigger than 10. • n == 0: Offset = 4MB • n == 2: Offset = 1MB • Others & n <= 10 : Offset = 1MB*2^n • For FlexSPI boot, the valid values are: 0, 1, 2, 3, 4, 5, 6, and 7. Tested remove the first one image and have the board still booting on second one. This implementation cover one architecture Signed-off-by: Michael Trimarchi --- arch/arm/mach-imx/cmd_nandbcb.c | 41 +++++++++++++++++++++++++++++++-- 1 file changed, 39 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 09622c13c9..348f8b626a 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -132,6 +132,7 @@ static struct platform_config imx8q_plat_config = { /* boot search related variables and definitions */ static int g_boot_search_count = 4; +static int g_boot_secondary_offset; static int g_boot_search_stride; static int g_pages_per_stride; @@ -275,9 +276,9 @@ static int nandbcb_set_boot_config(int argc, char * const argv[], boot_stream2_address = ((maxsize - boot_stream1_address) / 2 + boot_stream1_address); - if (boot_cfg->secondary_boot_stream_off_in_MB) + if (g_boot_secondary_offset) boot_stream2_address = - (loff_t)boot_cfg->secondary_boot_stream_off_in_MB * 1024 * 1024; + (loff_t)g_boot_secondary_offset * 1024 * 1024; max_boot_stream_size = boot_stream2_address - boot_stream1_address; @@ -1269,6 +1270,36 @@ static bool check_fingerprint(void *data, int fingerprint) return (*(int *)(data + off) == fingerprint); } +static int fuse_secondary_boot(u32 bank, u32 word, u32 mask, u32 off) +{ + int err; + u32 val; + int ret; + + err = fuse_read(bank, word, &val); + if (err) + return 0; + + val = (val & mask) >> off; + + if (val > 10) + return 0; + + switch (val) { + case 0: + ret = 4; + break; + case 1: + ret = 1; + break; + default: + ret = 2 << val; + break; + } + + return ret; +}; + static int fuse_to_search_count(u32 bank, u32 word, u32 mask, u32 off) { int err; @@ -1506,6 +1537,12 @@ static int do_nandbcb(struct cmd_tbl *cmdtp, int flag, int argc, g_boot_search_count); } + if ((plat_config.misc_flags) & FIRMWARE_SECONDARY_FIXED_ADDR) { + if (is_imx8mn()) + g_boot_secondary_offset = fuse_secondary_boot(2, 1, 0xff0000, 16); + + } + cmd = argv[1]; --argc; ++argv; -- 2.25.1