From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 066B9C433EF for ; Wed, 17 Nov 2021 12:42:41 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7641861BCF for ; Wed, 17 Nov 2021 12:42:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7641861BCF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=windriver.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EBC0982F7C; Wed, 17 Nov 2021 13:42:30 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=windriver.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id E95F683467; Wed, 17 Nov 2021 13:41:46 +0100 (CET) Received: from mail1.wrs.com (unknown-3-146.windriver.com [147.11.3.146]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id DB49182F86 for ; Wed, 17 Nov 2021 13:41:24 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=windriver.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=Ovidiu.Panait@windriver.com Received: from mail.windriver.com (mail.wrs.com [147.11.1.11]) by mail1.wrs.com (8.15.2/8.15.2) with ESMTPS id 1AHCfChY020080 (version=TLSv1.1 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL); Wed, 17 Nov 2021 04:41:13 -0800 Received: from ala-exchng01.corp.ad.wrs.com (ala-exchng01.corp.ad.wrs.com [147.11.82.252]) by mail.windriver.com (8.15.2/8.15.2) with ESMTPS id 1AHCf7oK029454 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 17 Nov 2021 04:41:12 -0800 (PST) Received: from otp-linux03.wrs.com (128.224.125.155) by ala-exchng01.corp.ad.wrs.com (147.11.82.252) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Wed, 17 Nov 2021 04:41:06 -0800 From: Ovidiu Panait To: CC: , Ovidiu Panait Subject: [PATCH 02/10] microblaze: u-boot.lds: replace __end symbol with _end Date: Wed, 17 Nov 2021 14:40:18 +0200 Message-ID: <20211117124026.1410172-2-ovidiu.panait@windriver.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211117124026.1410172-1-ovidiu.panait@windriver.com> References: <20211117124026.1410172-1-ovidiu.panait@windriver.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [128.224.125.155] X-ClientProxiedBy: ala-exchng01.corp.ad.wrs.com (147.11.82.252) To ala-exchng01.corp.ad.wrs.com (147.11.82.252) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.35 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean board_fdt_blob_setup() uses the _end symbol to find the dtb in the non-spl case. In order to allow microblaze builds to compile successfully with CONFIG_OF_SEPARATE, the _end symbol must be defined. Align microblaze with the other architectures and use _end symbol rather than __end to mark the end of the u-boot binary. Signed-off-by: Ovidiu Panait --- arch/microblaze/cpu/start.S | 4 ++-- arch/microblaze/cpu/u-boot-spl.lds | 4 ++-- arch/microblaze/cpu/u-boot.lds | 2 +- arch/microblaze/include/asm/processor.h | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 9479737aa2..463e0feba4 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -15,7 +15,7 @@ _start: mts rmsr, r0 /* disable cache */ - addi r8, r0, __end + addi r8, r0, _end mts rslr, r8 #if defined(CONFIG_SPL_BUILD) @@ -270,7 +270,7 @@ relocate_code: add r23, r0, r7 /* Move reloc addr to r23 */ /* Relocate text and data - r12 temp value */ addi r21, r0, _start - addi r22, r0, __end - 4 /* Include BSS too */ + addi r22, r0, _end - 4 /* Include BSS too */ rsub r6, r21, r22 or r5, r0, r0 diff --git a/arch/microblaze/cpu/u-boot-spl.lds b/arch/microblaze/cpu/u-boot-spl.lds index 3387eb7189..7883a64b15 100644 --- a/arch/microblaze/cpu/u-boot-spl.lds +++ b/arch/microblaze/cpu/u-boot-spl.lds @@ -53,10 +53,10 @@ SECTIONS . = ALIGN(4); __bss_end = .; } - __end = . ; + _end = . ; } #if defined(CONFIG_SPL_MAX_FOOTPRINT) -ASSERT(__end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \ +ASSERT(_end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \ "SPL image plus BSS too big"); #endif diff --git a/arch/microblaze/cpu/u-boot.lds b/arch/microblaze/cpu/u-boot.lds index 5dc09dbad2..2b316cc7f5 100644 --- a/arch/microblaze/cpu/u-boot.lds +++ b/arch/microblaze/cpu/u-boot.lds @@ -56,5 +56,5 @@ SECTIONS . = ALIGN(4); __bss_end = .; } - __end = . ; + _end = . ; } diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h index 16e0d0ef0a..958018c190 100644 --- a/arch/microblaze/include/asm/processor.h +++ b/arch/microblaze/include/asm/processor.h @@ -8,7 +8,7 @@ /* References to section boundaries */ -extern char __end[]; +extern char _end[]; extern char __text_start[]; /* Microblaze board initialization function */ -- 2.25.1