From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15311C433EF for ; Wed, 17 Nov 2021 12:42:03 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5CB6963220 for ; Wed, 17 Nov 2021 12:42:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5CB6963220 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=windriver.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E6F88834D2; Wed, 17 Nov 2021 13:41:56 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=windriver.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 200E982F7E; Wed, 17 Nov 2021 13:41:37 +0100 (CET) Received: from mail1.wrs.com (unknown-3-146.windriver.com [147.11.3.146]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 478898316B for ; Wed, 17 Nov 2021 13:41:24 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=windriver.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=Ovidiu.Panait@windriver.com Received: from mail.windriver.com (mail.wrs.com [147.11.1.11]) by mail1.wrs.com (8.15.2/8.15.2) with ESMTPS id 1AHCfCEI020081 (version=TLSv1.1 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL); Wed, 17 Nov 2021 04:41:13 -0800 Received: from ala-exchng01.corp.ad.wrs.com (ala-exchng01.corp.ad.wrs.com [147.11.82.252]) by mail.windriver.com (8.15.2/8.15.2) with ESMTPS id 1AHCf7oL029454 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 17 Nov 2021 04:41:12 -0800 (PST) Received: from otp-linux03.wrs.com (128.224.125.155) by ala-exchng01.corp.ad.wrs.com (147.11.82.252) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Wed, 17 Nov 2021 04:41:07 -0800 From: Ovidiu Panait To: CC: , Ovidiu Panait Subject: [PATCH 03/10] microblaze: spl: add board_boot_order() implementation Date: Wed, 17 Nov 2021 14:40:19 +0200 Message-ID: <20211117124026.1410172-3-ovidiu.panait@windriver.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211117124026.1410172-1-ovidiu.panait@windriver.com> References: <20211117124026.1410172-1-ovidiu.panait@windriver.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [128.224.125.155] X-ClientProxiedBy: ala-exchng01.corp.ad.wrs.com (147.11.82.252) To ala-exchng01.corp.ad.wrs.com (147.11.82.252) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.35 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Microblaze has three boot modes defined in microblaze/include/asm/spl.h, but only booting from NOR flash is currently useable. Add a custom board_boot_order() implementation so that RAM and SPI boot modes can also be selected if the corresponding load-image support is present. Signed-off-by: Ovidiu Panait --- arch/microblaze/cpu/spl.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index 86522f8447..06d4af99b2 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -15,9 +15,11 @@ bool boot_linux; -u32 spl_boot_device(void) +void board_boot_order(u32 *spl_boot_list) { - return BOOT_DEVICE_NOR; + spl_boot_list[0] = BOOT_DEVICE_NOR; + spl_boot_list[1] = BOOT_DEVICE_RAM; + spl_boot_list[2] = BOOT_DEVICE_SPI; } /* Board initialization after bss clearance */ -- 2.25.1