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From: Varad Gautam <varadgautam@gmail.com>
To: kvm@vger.kernel.org
Cc: pbonzini@redhat.com, drjones@redhat.com, zxwang42@gmail.com,
	marcorr@google.com, erdemaktas@google.com, rientjes@google.com,
	seanjc@google.com, brijesh.singh@amd.com,
	Thomas.Lendacky@amd.com, jroedel@suse.de, bp@suse.de,
	varad.gautam@suse.com
Subject: [RFC kvm-unit-tests 06/12] x86: AMD SEV-ES: Handle WBINVD #VC
Date: Wed, 17 Nov 2021 14:47:46 +0100	[thread overview]
Message-ID: <20211117134752.32662-7-varad.gautam@suse.com> (raw)
In-Reply-To: <20211117134752.32662-1-varad.gautam@suse.com>

Add Linux's sev_es_ghcb_hv_call helper to allow VMGEXIT from the #VC
handler, and handle SVM_EXIT_WBINVD using this.

Signed-off-by: Varad Gautam <varad.gautam@suse.com>
---
 lib/x86/amd_sev_vc.c | 66 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/lib/x86/amd_sev_vc.c b/lib/x86/amd_sev_vc.c
index 142f2cd..27a3ed0 100644
--- a/lib/x86/amd_sev_vc.c
+++ b/lib/x86/amd_sev_vc.c
@@ -52,6 +52,69 @@ static void vc_finish_insn(struct es_em_ctxt *ctxt)
 	ctxt->regs->rip += ctxt->insn.length;
 }
 
+static inline u64 lower_bits(u64 val, unsigned int bits)
+{
+	u64 mask = (1ULL << bits) - 1;
+
+	return (val & mask);
+}
+
+static inline void sev_es_wr_ghcb_msr(u64 val)
+{
+	wrmsr(MSR_AMD64_SEV_ES_GHCB, val);
+}
+
+static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
+					  struct es_em_ctxt *ctxt,
+					  u64 exit_code, u64 exit_info_1,
+					  u64 exit_info_2)
+{
+	enum es_result ret;
+
+	/* Fill in protocol and format specifiers */
+	ghcb->protocol_version = GHCB_PROTOCOL_MAX;
+	ghcb->ghcb_usage       = GHCB_DEFAULT_USAGE;
+
+	ghcb_set_sw_exit_code(ghcb, exit_code);
+	ghcb_set_sw_exit_info_1(ghcb, exit_info_1);
+	ghcb_set_sw_exit_info_2(ghcb, exit_info_2);
+
+	sev_es_wr_ghcb_msr(__pa(ghcb));
+	VMGEXIT();
+
+	if ((ghcb->save.sw_exit_info_1 & 0xffffffff) == 1) {
+		u64 info = ghcb->save.sw_exit_info_2;
+		unsigned long v;
+
+		info = ghcb->save.sw_exit_info_2;
+		v = info & SVM_EVTINJ_VEC_MASK;
+
+		/* Check if exception information from hypervisor is sane. */
+		if ((info & SVM_EVTINJ_VALID) &&
+		    ((v == GP_VECTOR) || (v == UD_VECTOR)) &&
+		    ((info & SVM_EVTINJ_TYPE_MASK) == SVM_EVTINJ_TYPE_EXEPT)) {
+			ctxt->fi.vector = v;
+			if (info & SVM_EVTINJ_VALID_ERR)
+				ctxt->fi.error_code = info >> 32;
+			ret = ES_EXCEPTION;
+		} else {
+			ret = ES_VMM_ERROR;
+		}
+	} else if (ghcb->save.sw_exit_info_1 & 0xffffffff) {
+		ret = ES_VMM_ERROR;
+	} else {
+		ret = ES_OK;
+	}
+
+	return ret;
+}
+
+static enum es_result vc_handle_wbinvd(struct ghcb *ghcb,
+				       struct es_em_ctxt *ctxt)
+{
+	return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0);
+}
+
 static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,
 					 struct ghcb *ghcb,
 					 unsigned long exit_code)
@@ -59,6 +122,9 @@ static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,
 	enum es_result result;
 
 	switch (exit_code) {
+	case SVM_EXIT_WBINVD:
+		result = vc_handle_wbinvd(ghcb, ctxt);
+		break;
 	default:
 		/*
 		 * Unexpected #VC exception
-- 
2.32.0


  parent reply	other threads:[~2021-11-17 13:50 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-17 13:47 [RFC kvm-unit-tests 00/12] Add #VC exception handling for AMD SEV-ES Varad Gautam
2021-11-17 13:47 ` [RFC kvm-unit-tests 01/12] x86: AMD SEV-ES: Setup #VC exception handler " Varad Gautam
2021-12-07  3:44   ` Marc Orr
2021-11-17 13:47 ` [RFC kvm-unit-tests 02/12] x86: Move svm.h to lib/x86/ Varad Gautam
2021-12-07  3:49   ` Marc Orr
2021-11-17 13:47 ` [RFC kvm-unit-tests 03/12] lib: x86: Import insn decoder from Linux Varad Gautam
2021-11-17 13:47 ` [RFC kvm-unit-tests 04/12] x86: AMD SEV-ES: Pull related GHCB definitions and helpers " Varad Gautam
2021-11-17 13:47 ` [RFC kvm-unit-tests 05/12] x86: AMD SEV-ES: Prepare for #VC processing Varad Gautam
2021-11-17 13:47 ` Varad Gautam [this message]
2021-11-17 13:47 ` [RFC kvm-unit-tests 07/12] lib/x86: Move xsave helpers to lib/ Varad Gautam
2021-11-17 13:47 ` [RFC kvm-unit-tests 08/12] x86: AMD SEV-ES: Handle CPUID #VC Varad Gautam
2021-11-17 13:47 ` [RFC kvm-unit-tests 09/12] x86: AMD SEV-ES: Handle RDTSC/RDTSCP #VC Varad Gautam
2021-11-17 13:47 ` [RFC kvm-unit-tests 10/12] x86: AMD SEV-ES: Handle MSR #VC Varad Gautam
2021-11-17 13:47 ` [RFC kvm-unit-tests 11/12] x86: AMD SEV-ES: Handle IOIO #VC Varad Gautam
2021-11-17 13:47 ` [RFC kvm-unit-tests 12/12] x86: AMD SEV-ES: Handle string IO for " Varad Gautam

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