From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 120D7C433F5 for ; Thu, 18 Nov 2021 10:13:45 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5737D61B29 for ; Thu, 18 Nov 2021 10:13:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5737D61B29 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DC31482F7E; Thu, 18 Nov 2021 11:13:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="OJOKX/WX"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 44FF682F82; Thu, 18 Nov 2021 11:13:23 +0100 (CET) Received: from mail-pg1-x534.google.com (mail-pg1-x534.google.com [IPv6:2607:f8b0:4864:20::534]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4C8BC80F54 for ; Thu, 18 Nov 2021 11:13:17 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jaimeliao.tw@gmail.com Received: by mail-pg1-x534.google.com with SMTP id 28so4899358pgq.8 for ; Thu, 18 Nov 2021 02:13:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AqF1f/V3yfq9U9ksUmXslOLjvgdvXKwbwrnhKg3y5+k=; b=OJOKX/WX+CRs/2L7eqMSve3Ax9LxrB62OpkGWQGniGC/7X3Wx73uGtmlNSTTvBAzpJ qrH1XJLPLHCfZkh95vwCIFo3yre3yh57AcJiu+jh3Zc6ApYt3Q3Ft6VIVTo404L67bd2 UtINRySzR3yVb7LGhrwzvQ5PjSmNjdw3lTBPLiNwWgcmCFNuhZXpUpeI7gcOhmV3PvM3 E7g81ViEupSjCR7qE3tzaAreE6Qo4Ef7MEkYlfoU1ll52GmfN43D0cKd47/yG84evewB +KBaRNhmwZLZTRTuYf9+amvN8KXjnsGBlNAShT19N7oxwnLi546Cq+4w/H8NPl8NvWtU Fhrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AqF1f/V3yfq9U9ksUmXslOLjvgdvXKwbwrnhKg3y5+k=; b=nHTgivlxonT/jWpWdb4nrm76mqDWGPoaKxoBSmAGMf56ZPN2olBtq5+GKwYbr/dQeA zDIoBHmVRky7bGktOkZpspuTFeu8vjfB/SRdPFv28DVb07B63FG4X3/AO4JRhRPWEkJQ OoTJaHH/MQy1TuCWoquaIJTGbxBjVI2Xa/1f7LvCjtSiZJw9DW+xRP8eEdqQNZEAcPYK Yas98xXdgSg1RkF/ebAAkQyh6RKINZ1fasQzCNR7aLp02Bx946WQwEX/5ZLK6c+u/iHD vsReiaQCgvLgncx3cWQSHF6wRfCHReI/xOiv/qwUSLRbXvOMgNTjRXytt6yLND0XPJSY DpVA== X-Gm-Message-State: AOAM5308RlZyAI6P183tCCDtSaJEYq2z9IeuGOZi1OBywcUZSD9UcO6+ ga0DyC0BPGi6LzSRSqIqcjrPxbIUnbk= X-Google-Smtp-Source: ABdhPJyaNIf3nFCH2MN7tkYjLMp93HdBGW7LMYJOy0adbzmMN3oPVvkIe+C1JCEjwV56gaRtqYud0Q== X-Received: by 2002:aa7:8105:0:b0:4a0:2f7c:81b with SMTP id b5-20020aa78105000000b004a02f7c081bmr13879789pfi.25.1637230395332; Thu, 18 Nov 2021 02:13:15 -0800 (PST) Received: from localhost.localdomain ([123.51.145.88]) by smtp.gmail.com with ESMTPSA id y18sm3137000pfa.142.2021.11.18.02.13.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Nov 2021 02:13:15 -0800 (PST) From: JaimeLiao To: u-boot@lists.denx.de, jagan@amarulasolutions.com, vigneshr@ti.com, p.yadav@ti.com Cc: zhengxunli@mxic.com.tw, jaimeliao@mxic.com.tw, JaimeLiao Subject: [PATCH v5 2/3] mtd: spi-nor-core: Adding different type of command extension in Soft Reset Date: Thu, 18 Nov 2021 18:13:02 +0800 Message-Id: <20211118101303.26061-3-jaimeliao.tw@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211118101303.26061-1-jaimeliao.tw@gmail.com> References: <20211118101303.26061-1-jaimeliao.tw@gmail.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.35 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from 8D-8D-8D in the begging of probe. Command extension type is not standardized across flash vendors in DTR mode. For suiting different vendor flash devices, adding a flag to seperate types for soft reset on boot. Signed-off-by: JaimeLiao --- drivers/mtd/spi/Kconfig | 7 +++++++ drivers/mtd/spi/spi-nor-core.c | 7 ++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 1b2ef37e92..9b7d195770 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -97,6 +97,13 @@ config SPI_FLASH_SMART_HWCAPS can support a type of operation in a much more refined way compared to using flags like SPI_RX_DUAL, SPI_TX_QUAD, etc. +config SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT + bool "Command extension type is INVERT for Software Reset on boot" + default n + help + Because of SFDP information can not be get before boot. + So define command extension type is INVERT when Software Reset on boot only. + config SPI_FLASH_SOFT_RESET bool "Software Reset support for SPI NOR flashes" default n diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 0a6550984b..2b6947cefc 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3661,7 +3661,12 @@ static int spi_nor_soft_reset(struct spi_nor *nor) enum spi_nor_cmd_ext ext; ext = nor->cmd_ext_type; - nor->cmd_ext_type = SPI_NOR_EXT_REPEAT; + if (nor->cmd_ext_type == SPI_NOR_EXT_NONE) { + nor->cmd_ext_type = SPI_NOR_EXT_REPEAT; +#if CONFIG_IS_ENABLED(SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT) + nor->cmd_ext_type = SPI_NOR_EXT_INVERT; +#endif /* SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT */ + } op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), SPI_MEM_OP_NO_DUMMY, -- 2.17.1