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Date:   Sat, 20 Nov 2021 19:55:06 -0800
From:   Ben Widawsky <ben.widawsky@intel.com>
To:     Randy Dunlap <rdunlap@infradead.org>
Cc:     linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
        Alison Schofield <alison.schofield@intel.com>,
        Dan Williams <dan.j.williams@intel.com>,
        Ira Weiny <ira.weiny@intel.com>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        Vishal Verma <vishal.l.verma@intel.com>
Subject: Re: [PATCH 22/23] cxl/mem: Introduce cxl_mem driver
Message-ID: <20211121035506.zvq6ebs4i6msbi22@intel.com>
References: <20211120000250.1663391-1-ben.widawsky@intel.com>
 <20211120000250.1663391-23-ben.widawsky@intel.com>
 <8eece50a-ffc6-700a-1613-4d45de37bdd2@infradead.org>
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On 21-11-19 16:40:09, Randy Dunlap wrote:
> On 11/19/21 4:02 PM, Ben Widawsky wrote:
> > diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
> > index 3aeb33bba5a3..f5553443ba2a 100644
> > --- a/drivers/cxl/Kconfig
> > +++ b/drivers/cxl/Kconfig
> > @@ -30,6 +30,21 @@ config CXL_PCI
> >   	  If unsure say 'm'.
> > +config CXL_MEM
> > +	tristate "CXL.mem: Memory Devices"
> > +	default CXL_BUS
> > +        help
> > +          The CXL.mem protocol allows a device to act as a provider of
> > +	  "System RAM" and/or "Persistent Memory" that is fully coherent
> > +	  as if the memory was attached to the typical CPU memory controller.
> > +	  This is known as HDM "Host-managed Device Memory".
> > +
> > +	  Say 'y/m' to enable a driver that will attach to CXL.mem devices for
> > +	  memory expansion and control of HDM. See Chapter 9.13 in the CXL 2.0
> > +	  specification for a detailed description of HDM.
> > +
> > +	  If unsure say 'm'.
> 
> Hi Ben,
> 
> Both patch 20 and patch 22 add a "new" CXL_MEM config symbol.
> Is one of them a typo?
> 
> thanks.

Yep. Thank you. Fixed for v2 and I added a reported-by tag from you.

> -- 
> ~Randy