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From: Evan Quan <evan.quan@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Alexander.Deucher@amd.com, lijo.lazar@amd.com,
	Kenneth.Feng@amd.com, christian.koenig@amd.com,
	Evan Quan <evan.quan@amd.com>
Subject: [PATCH V2 10/17] drm/amd/pm: move those code piece used by Stoney only to smu8_hwmgr.c
Date: Tue, 30 Nov 2021 15:42:52 +0800	[thread overview]
Message-ID: <20211130074259.1271965-11-evan.quan@amd.com> (raw)
In-Reply-To: <20211130074259.1271965-1-evan.quan@amd.com>

Instead of putting them in amdgpu_dpm.c.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Change-Id: Ieb7ed5fb6140401a7692b401c5a42dc53da92af8
---
 drivers/gpu/drm/amd/pm/amdgpu_dpm.c                | 14 --------------
 drivers/gpu/drm/amd/pm/inc/hwmgr.h                 |  3 ---
 .../gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c    | 10 +++++++++-
 3 files changed, 9 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index 1399b4426080..c6299e406848 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -32,8 +32,6 @@
 #include "hwmgr.h"
 #include <linux/power_supply.h>
 
-#define WIDTH_4K 3840
-
 #define amdgpu_dpm_enable_bapm(adev, e) \
 		((adev)->powerplay.pp_funcs->enable_bapm((adev)->powerplay.pp_handle, (e)))
 
@@ -383,18 +381,6 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
 	if (ret)
 		DRM_ERROR("Dpm %s uvd failed, ret = %d. \n",
 			  enable ? "enable" : "disable", ret);
-
-	/* enable/disable Low Memory PState for UVD (4k videos) */
-	if (adev->asic_type == CHIP_STONEY &&
-		adev->uvd.decode_image_width >= WIDTH_4K) {
-		struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
-
-		if (hwmgr && hwmgr->hwmgr_func &&
-		    hwmgr->hwmgr_func->update_nbdpm_pstate)
-			hwmgr->hwmgr_func->update_nbdpm_pstate(hwmgr,
-							       !enable,
-							       true);
-	}
 }
 
 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
diff --git a/drivers/gpu/drm/amd/pm/inc/hwmgr.h b/drivers/gpu/drm/amd/pm/inc/hwmgr.h
index 8ed01071fe5a..03226baea65e 100644
--- a/drivers/gpu/drm/amd/pm/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/pm/inc/hwmgr.h
@@ -331,9 +331,6 @@ struct pp_hwmgr_func {
 					uint32_t mc_addr_low,
 					uint32_t mc_addr_hi,
 					uint32_t size);
-	int (*update_nbdpm_pstate)(struct pp_hwmgr *hwmgr,
-					bool enable,
-					bool lock);
 	int (*get_thermal_temperature_range)(struct pp_hwmgr *hwmgr,
 					struct PP_TemperatureRange *range);
 	int (*get_power_profile_mode)(struct pp_hwmgr *hwmgr, char *buf);
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
index 03bf8f069222..b50fd4a4a3d1 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
@@ -1950,9 +1950,12 @@ static void smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate)
 		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerON, NULL);
 }
 
+#define WIDTH_4K		3840
+
 static void smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
 {
 	struct smu8_hwmgr *data = hwmgr->backend;
+	struct amdgpu_device *adev = hwmgr->adev;
 
 	data->uvd_power_gated = bgate;
 
@@ -1976,6 +1979,12 @@ static void smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
 		smu8_dpm_update_uvd_dpm(hwmgr, false);
 	}
 
+	/* enable/disable Low Memory PState for UVD (4k videos) */
+	if (adev->asic_type == CHIP_STONEY &&
+	    adev->uvd.decode_image_width >= WIDTH_4K)
+		smu8_nbdpm_pstate_enable_disable(hwmgr,
+						 bgate,
+						 true);
 }
 
 static void smu8_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
@@ -2037,7 +2046,6 @@ static const struct pp_hwmgr_func smu8_hwmgr_funcs = {
 	.power_state_set = smu8_set_power_state_tasks,
 	.dynamic_state_management_disable = smu8_disable_dpm_tasks,
 	.notify_cac_buffer_info = smu8_notify_cac_buffer_info,
-	.update_nbdpm_pstate = smu8_nbdpm_pstate_enable_disable,
 	.get_thermal_temperature_range = smu8_get_thermal_temperature_range,
 };
 
-- 
2.29.0


  parent reply	other threads:[~2021-11-30  7:43 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-30  7:42 [PATCH V2 00/17] Unified entry point for other blocks to interact with power Evan Quan
2021-11-30  7:42 ` [PATCH V2 01/17] drm/amd/pm: do not expose implementation details to other blocks out of power Evan Quan
2021-11-30  8:09   ` Lazar, Lijo
2021-12-01  1:59     ` Quan, Evan
2021-12-01  3:33       ` Lazar, Lijo
2021-12-01  7:07         ` Quan, Evan
2021-12-01  3:37     ` Lazar, Lijo
2021-11-30  7:42 ` [PATCH V2 02/17] drm/amd/pm: do not expose power implementation details to amdgpu_pm.c Evan Quan
2021-11-30 13:04   ` Chen, Guchun
2021-12-01  2:06     ` Quan, Evan
2021-11-30  7:42 ` [PATCH V2 03/17] drm/amd/pm: do not expose power implementation details to display Evan Quan
2021-11-30  7:42 ` [PATCH V2 04/17] drm/amd/pm: do not expose those APIs used internally only in amdgpu_dpm.c Evan Quan
2021-11-30  7:42 ` [PATCH V2 05/17] drm/amd/pm: do not expose those APIs used internally only in si_dpm.c Evan Quan
2021-11-30 12:22   ` Lazar, Lijo
2021-12-01  2:07     ` Quan, Evan
2021-11-30  7:42 ` [PATCH V2 06/17] drm/amd/pm: do not expose the API used internally only in kv_dpm.c Evan Quan
2021-11-30 12:27   ` Lazar, Lijo
2021-12-01  2:47     ` Quan, Evan
2021-11-30  7:42 ` [PATCH V2 07/17] drm/amd/pm: create a new holder for those APIs used only by legacy ASICs(si/kv) Evan Quan
2021-11-30 13:21   ` Lazar, Lijo
2021-12-01  3:13     ` Quan, Evan
2021-12-01  4:19       ` Lazar, Lijo
2021-12-01  7:17         ` Quan, Evan
2021-12-01  7:36           ` Lazar, Lijo
2021-12-02  1:24             ` Quan, Evan
2021-11-30  7:42 ` [PATCH V2 08/17] drm/amd/pm: move pp_force_state_enabled member to amdgpu_pm structure Evan Quan
2021-11-30  7:42 ` [PATCH V2 09/17] drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations Evan Quan
2021-11-30  7:42 ` Evan Quan [this message]
2021-11-30  7:42 ` [PATCH V2 11/17] drm/amd/pm: correct the usage for amdgpu_dpm_dispatch_task() Evan Quan
2021-11-30 13:48   ` Lazar, Lijo
2021-12-01  3:50     ` Quan, Evan
2021-11-30  7:42 ` [PATCH V2 12/17] drm/amd/pm: drop redundant or unused APIs and data structures Evan Quan
2021-11-30  7:42 ` [PATCH V2 13/17] drm/amd/pm: do not expose the smu_context structure used internally in power Evan Quan
2021-11-30 13:57   ` Lazar, Lijo
2021-12-01  5:39     ` Quan, Evan
2021-12-01  6:38       ` Lazar, Lijo
2021-12-01  7:24         ` Quan, Evan
2021-11-30  7:42 ` [PATCH V2 14/17] drm/amd/pm: relocate the power related headers Evan Quan
2021-11-30 14:07   ` Lazar, Lijo
2021-12-01  6:22     ` Quan, Evan
2021-11-30  7:42 ` [PATCH V2 15/17] drm/amd/pm: drop unnecessary gfxoff controls Evan Quan
2021-11-30  7:42 ` [PATCH V2 16/17] drm/amd/pm: revise the performance level setting APIs Evan Quan
2021-11-30  7:42 ` [PATCH V2 17/17] drm/amd/pm: unified lock protections in amdgpu_dpm.c Evan Quan
2021-11-30  9:58 ` [PATCH V2 00/17] Unified entry point for other blocks to interact with power Christian König

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