From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10C14C433F5 for ; Tue, 30 Nov 2021 16:47:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238459AbhK3Quv (ORCPT ); Tue, 30 Nov 2021 11:50:51 -0500 Received: from verein.lst.de ([213.95.11.211]:59748 "EHLO verein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229658AbhK3Qtq (ORCPT ); Tue, 30 Nov 2021 11:49:46 -0500 Received: by verein.lst.de (Postfix, from userid 2407) id 1EC9D68B05; Tue, 30 Nov 2021 17:46:23 +0100 (CET) Date: Tue, 30 Nov 2021 17:46:22 +0100 From: Christoph Hellwig To: Zhi Wang Cc: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Christoph Hellwig , Jason Gunthorpe , Jani Nikula , Joonas Lahtinen , Vivi Rodrigo , Zhenyu Wang , Zhi Wang , Terrence Xu Subject: Re: [PATCH v4 1/2] i915/gvt: Introduce the mmio_info_table.c to support VFIO new mdev API Message-ID: <20211130164622.GA15150@lst.de> References: <20211129123832.105196-1-zhi.a.wang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211129123832.105196-1-zhi.a.wang@intel.com> User-Agent: Mutt/1.5.17 (2007-11-01) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org I still think this goes into the wrong direction. Something closer to your first version that also saves away the gvt->mmio.mmio_attribute flags in the core i915 module, and which splits the MMIO table into one that contains just the offset, size and flags (core i915) and one that has the read-only mask and handlers (gvt) would be much simpler and not create this super-tight coupling between core i915 and gvt. Bonus points for moving your new intel_gvt_hw_state structure out of struct intel_gvt and into struct i915_virtual_gpu. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3EDBC433FE for ; Tue, 30 Nov 2021 16:46:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F34C16E4BB; Tue, 30 Nov 2021 16:46:28 +0000 (UTC) Received: from verein.lst.de (verein.lst.de [213.95.11.211]) by gabe.freedesktop.org (Postfix) with ESMTPS id C64746E487; Tue, 30 Nov 2021 16:46:27 +0000 (UTC) Received: by verein.lst.de (Postfix, from userid 2407) id 1EC9D68B05; Tue, 30 Nov 2021 17:46:23 +0100 (CET) Date: Tue, 30 Nov 2021 17:46:22 +0100 From: Christoph Hellwig To: Zhi Wang Message-ID: <20211130164622.GA15150@lst.de> References: <20211129123832.105196-1-zhi.a.wang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211129123832.105196-1-zhi.a.wang@intel.com> User-Agent: Mutt/1.5.17 (2007-11-01) Subject: Re: [Intel-gfx] [PATCH v4 1/2] i915/gvt: Introduce the mmio_info_table.c to support VFIO new mdev API X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Terrence Xu , Jason Gunthorpe , intel-gvt-dev@lists.freedesktop.org, Christoph Hellwig Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" I still think this goes into the wrong direction. Something closer to your first version that also saves away the gvt->mmio.mmio_attribute flags in the core i915 module, and which splits the MMIO table into one that contains just the offset, size and flags (core i915) and one that has the read-only mask and handlers (gvt) would be much simpler and not create this super-tight coupling between core i915 and gvt. Bonus points for moving your new intel_gvt_hw_state structure out of struct intel_gvt and into struct i915_virtual_gpu.