From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============0138886372800108374==" MIME-Version: 1.0 From: kernel test robot To: kbuild-all@lists.01.org Subject: Re: [PATCH v3 3/5] pinctrl: qcom: Move chip specific functions to right files Date: Wed, 01 Dec 2021 02:38:36 +0800 Message-ID: <202112010233.r9AHDSfL-lkp@intel.com> In-Reply-To: <1638179932-3353-4-git-send-email-srivasam@codeaurora.org> List-Id: --===============0138886372800108374== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Hi Srinivasa, Thank you for the patch! Yet something to improve: [auto build test ERROR on linusw-pinctrl/devel] [also build test ERROR on v5.16-rc3 next-20211130] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Srinivasa-Rao-Mandadapu/Ad= d-pin-control-support-for-lpass-sc7280/20211129-180254 base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctr= l.git devel config: arm-allyesconfig (https://download.01.org/0day-ci/archive/20211201/= 202112010233.r9AHDSfL-lkp(a)intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0 reproduce (this is a W=3D1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/= make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/08f308b432fbb4f1eb2c05d94= 058fd365d79627a git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Srinivasa-Rao-Mandadapu/Add-pin-co= ntrol-support-for-lpass-sc7280/20211129-180254 git checkout 08f308b432fbb4f1eb2c05d94058fd365d79627a # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=3D$HOME/0day COMPILER=3Dgcc-11.2.0 make.cross= O=3Dbuild_dir ARCH=3Darm SHELL=3D/bin/bash If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): drivers/pinctrl/qcom/pinctrl-lpass-lpi.c: In function 'lpi_gpio_set_mux': >> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:113:9: error: implicit declarat= ion of function 'u32p_replace_bits' [-Werror=3Dimplicit-function-declaratio= n] 113 | u32p_replace_bits(&val, i, LPI_GPIO_FUNCTION_MASK); | ^~~~~~~~~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.c: In function 'lpi_config_get': >> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:138:16: error: implicit declara= tion of function 'FIELD_GET' [-Werror=3Dimplicit-function-declaration] 138 | pull =3D FIELD_GET(LPI_GPIO_PULL_MASK, ctl_reg); | ^~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.c: In function 'lpi_config_set': >> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:244:23: error: implicit declara= tion of function 'u32_encode_bits' [-Werror=3Dimplicit-function-declaration] 244 | val =3D u32_encode_bits(value ? 1 : 0, LPI_GPIO_= VALUE_OUT_MASK); | ^~~~~~~~~~~~~~~ In file included from drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:15: At top level: drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:133:27: warning: 'gpio13_pins' = defined but not used [-Wunused-const-variable=3D] 133 | static const unsigned int gpio13_pins[] =3D { 13 }; | ^~~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:132:27: warning: 'gpio12_pins' = defined but not used [-Wunused-const-variable=3D] 132 | static const unsigned int gpio12_pins[] =3D { 12 }; | ^~~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:131:27: warning: 'gpio11_pins' = defined but not used [-Wunused-const-variable=3D] 131 | static const unsigned int gpio11_pins[] =3D { 11 }; | ^~~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:130:27: warning: 'gpio10_pins' = defined but not used [-Wunused-const-variable=3D] 130 | static const unsigned int gpio10_pins[] =3D { 10 }; | ^~~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:129:27: warning: 'gpio9_pins' d= efined but not used [-Wunused-const-variable=3D] 129 | static const unsigned int gpio9_pins[] =3D { 9 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:128:27: warning: 'gpio8_pins' d= efined but not used [-Wunused-const-variable=3D] 128 | static const unsigned int gpio8_pins[] =3D { 8 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:127:27: warning: 'gpio7_pins' d= efined but not used [-Wunused-const-variable=3D] 127 | static const unsigned int gpio7_pins[] =3D { 7 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:126:27: warning: 'gpio6_pins' d= efined but not used [-Wunused-const-variable=3D] 126 | static const unsigned int gpio6_pins[] =3D { 6 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:125:27: warning: 'gpio5_pins' d= efined but not used [-Wunused-const-variable=3D] 125 | static const unsigned int gpio5_pins[] =3D { 5 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:124:27: warning: 'gpio4_pins' d= efined but not used [-Wunused-const-variable=3D] 124 | static const unsigned int gpio4_pins[] =3D { 4 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:123:27: warning: 'gpio3_pins' d= efined but not used [-Wunused-const-variable=3D] 123 | static const unsigned int gpio3_pins[] =3D { 3 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:122:27: warning: 'gpio2_pins' d= efined but not used [-Wunused-const-variable=3D] 122 | static const unsigned int gpio2_pins[] =3D { 2 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:121:27: warning: 'gpio1_pins' d= efined but not used [-Wunused-const-variable=3D] 121 | static const unsigned int gpio1_pins[] =3D { 1 }; | ^~~~~~~~~~ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:120:27: warning: 'gpio0_pins' d= efined but not used [-Wunused-const-variable=3D] 120 | static const unsigned int gpio0_pins[] =3D { 0 }; | ^~~~~~~~~~ cc1: some warnings being treated as errors vim +/u32p_replace_bits +113 drivers/pinctrl/qcom/pinctrl-lpass-lpi.c 6e261d1090d6db Srinivas Kandagatla 2020-12-02 95 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 96 static int lpi_gpio_set= _mux(struct pinctrl_dev *pctldev, unsigned int function, 6e261d1090d6db Srinivas Kandagatla 2020-12-02 97 unsigned int gro= up_num) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 98 { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 99 struct lpi_pinctrl *pc= trl =3D pinctrl_dev_get_drvdata(pctldev); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 100 const struct lpi_pingr= oup *g =3D &pctrl->data->groups[group_num]; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 101 u32 val; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 102 int i, pin =3D g->pin; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 103 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 104 for (i =3D 0; i < g->n= funcs; i++) { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 105 if (g->funcs[i] =3D= =3D function) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 106 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 107 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 108 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 109 if (WARN_ON(i =3D=3D g= ->nfuncs)) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 110 return -EINVAL; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 111 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 112 val =3D lpi_gpio_read(= pctrl, pin, LPI_GPIO_CFG_REG); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 @113 u32p_replace_bits(&val= , i, LPI_GPIO_FUNCTION_MASK); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 114 lpi_gpio_write(pctrl, = pin, LPI_GPIO_CFG_REG, val); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 115 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 116 return 0; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 117 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 118 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 119 static const struct pin= mux_ops lpi_gpio_pinmux_ops =3D { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 120 .get_functions_count = =3D lpi_gpio_get_functions_count, 6e261d1090d6db Srinivas Kandagatla 2020-12-02 121 .get_function_name =3D= lpi_gpio_get_function_name, 6e261d1090d6db Srinivas Kandagatla 2020-12-02 122 .get_function_groups = =3D lpi_gpio_get_function_groups, 6e261d1090d6db Srinivas Kandagatla 2020-12-02 123 .set_mux =3D lpi_gpio= _set_mux, 6e261d1090d6db Srinivas Kandagatla 2020-12-02 124 }; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 125 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 126 static int lpi_config_g= et(struct pinctrl_dev *pctldev, 6e261d1090d6db Srinivas Kandagatla 2020-12-02 127 unsigned int pin, = unsigned long *config) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 128 { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 129 unsigned int param =3D= pinconf_to_config_param(*config); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 130 struct lpi_pinctrl *st= ate =3D dev_get_drvdata(pctldev->dev); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 131 unsigned int arg =3D 0; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 132 int is_out; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 133 int pull; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 134 u32 ctl_reg; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 135 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 136 ctl_reg =3D lpi_gpio_r= ead(state, pin, LPI_GPIO_CFG_REG); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 137 is_out =3D ctl_reg & L= PI_GPIO_OE_MASK; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 @138 pull =3D FIELD_GET(LPI= _GPIO_PULL_MASK, ctl_reg); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 139 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 140 switch (param) { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 141 case PIN_CONFIG_BIAS_D= ISABLE: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 142 if (pull =3D=3D LPI_G= PIO_BIAS_DISABLE) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 143 arg =3D 1; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 144 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 145 case PIN_CONFIG_BIAS_P= ULL_DOWN: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 146 if (pull =3D=3D LPI_G= PIO_PULL_DOWN) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 147 arg =3D 1; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 148 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 149 case PIN_CONFIG_BIAS_B= US_HOLD: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 150 if (pull =3D=3D LPI_G= PIO_KEEPER) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 151 arg =3D 1; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 152 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 153 case PIN_CONFIG_BIAS_P= ULL_UP: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 154 if (pull =3D=3D LPI_G= PIO_PULL_UP) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 155 arg =3D 1; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 156 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 157 case PIN_CONFIG_INPUT_= ENABLE: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 158 case PIN_CONFIG_OUTPUT: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 159 if (is_out) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 160 arg =3D 1; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 161 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 162 default: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 163 return -EINVAL; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 164 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 165 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 166 *config =3D pinconf_to= _config_packed(param, arg); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 167 return 0; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 168 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 169 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 170 static int lpi_config_s= et(struct pinctrl_dev *pctldev, unsigned int group, 6e261d1090d6db Srinivas Kandagatla 2020-12-02 171 unsigned long *con= figs, unsigned int nconfs) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 172 { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 173 struct lpi_pinctrl *pc= trl =3D dev_get_drvdata(pctldev->dev); 2a9be38099e338 Jonathan Marek 2021-03-04 174 unsigned int param, ar= g, pullup =3D LPI_GPIO_BIAS_DISABLE, strength =3D 2; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 175 bool value, output_ena= bled =3D false; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 176 const struct lpi_pingr= oup *g; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 177 unsigned long sval; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 178 int i, slew_offset; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 179 u32 val; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 180 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 181 g =3D &pctrl->data->gr= oups[group]; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 182 for (i =3D 0; i < ncon= fs; i++) { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 183 param =3D pinconf_to_= config_param(configs[i]); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 184 arg =3D pinconf_to_co= nfig_argument(configs[i]); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 185 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 186 switch (param) { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 187 case PIN_CONFIG_BIAS_= DISABLE: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 188 pullup =3D LPI_GPIO_= BIAS_DISABLE; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 189 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 190 case PIN_CONFIG_BIAS_= PULL_DOWN: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 191 pullup =3D LPI_GPIO_= PULL_DOWN; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 192 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 193 case PIN_CONFIG_BIAS_= BUS_HOLD: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 194 pullup =3D LPI_GPIO_= KEEPER; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 195 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 196 case PIN_CONFIG_BIAS_= PULL_UP: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 197 pullup =3D LPI_GPIO_= PULL_UP; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 198 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 199 case PIN_CONFIG_INPUT= _ENABLE: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 200 output_enabled =3D f= alse; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 201 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 202 case PIN_CONFIG_OUTPU= T: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 203 output_enabled =3D t= rue; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 204 value =3D arg; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 205 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 206 case PIN_CONFIG_DRIVE= _STRENGTH: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 207 strength =3D arg; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 208 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 209 case PIN_CONFIG_SLEW_= RATE: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 210 if (arg > LPI_SLEW_R= ATE_MAX) { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 211 dev_err(pctldev->de= v, "invalid slew rate %u for pin: %d\n", 6e261d1090d6db Srinivas Kandagatla 2020-12-02 212 arg, group); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 213 return -EINVAL; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 214 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 215 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 216 slew_offset =3D g->s= lew_offset; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 217 if (slew_offset =3D= =3D NO_SLEW) 6e261d1090d6db Srinivas Kandagatla 2020-12-02 218 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 219 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 220 mutex_lock(&pctrl->s= lew_access_lock); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 221 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 222 sval =3D ioread32(pc= trl->slew_base + LPI_SLEW_RATE_CTL_REG); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 223 sval &=3D ~(LPI_SLEW= _RATE_MASK << slew_offset); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 224 sval |=3D arg << sle= w_offset; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 225 iowrite32(sval, pctr= l->slew_base + LPI_SLEW_RATE_CTL_REG); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 226 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 227 mutex_unlock(&pctrl-= >slew_access_lock); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 228 break; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 229 default: 6e261d1090d6db Srinivas Kandagatla 2020-12-02 230 return -EINVAL; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 231 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 232 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 233 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 234 val =3D lpi_gpio_read(= pctrl, group, LPI_GPIO_CFG_REG); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 235 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 236 u32p_replace_bits(&val= , pullup, LPI_GPIO_PULL_MASK); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 237 u32p_replace_bits(&val= , LPI_GPIO_DS_TO_VAL(strength), 6e261d1090d6db Srinivas Kandagatla 2020-12-02 238 LPI_GPIO_OUT_STREN= GTH_MASK); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 239 u32p_replace_bits(&val= , output_enabled, LPI_GPIO_OE_MASK); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 240 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 241 lpi_gpio_write(pctrl, = group, LPI_GPIO_CFG_REG, val); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 242 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 243 if (output_enabled) { 6e261d1090d6db Srinivas Kandagatla 2020-12-02 @244 val =3D u32_encode_bi= ts(value ? 1 : 0, LPI_GPIO_VALUE_OUT_MASK); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 245 lpi_gpio_write(pctrl,= group, LPI_GPIO_VALUE_REG, val); 6e261d1090d6db Srinivas Kandagatla 2020-12-02 246 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 247 = 6e261d1090d6db Srinivas Kandagatla 2020-12-02 248 return 0; 6e261d1090d6db Srinivas Kandagatla 2020-12-02 249 } 6e261d1090d6db Srinivas Kandagatla 2020-12-02 250 = --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org --===============0138886372800108374==--