From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED696C433F5 for ; Fri, 3 Dec 2021 10:11:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=+4dvzPrhvGAk/bd8f9/Azuj5c3QpyBmaFosIM8tGPPA=; b=wIx/w5UT8+C83a fuH+FjOxxcIXC93m3a+AwtuVGujG6lcJvkHrNGAH4CvMLA936ynoz6IGRODJE5uo6FajszijRQI1O pnit5KXaD+b/1s0iLTCJXwGWQfuDChLdglHJGbmb0LgDUkCXT8JWjqQoluZzzwYLgqg5kN3bnBsEd emnYwDeSshSe/fsQoOBXBi2TIc7P0RkuseIf5W3UWsdMO2X4/ReGO3R+G/EwEoR6mnJPYehbXqCn4 r8+VFG75N7I06Xam4bd/FD9uoni25scMR2NmE0xxE0JHNrQae40Gf4DGsNt+ZQkH0Z8Ieu01KZr7Q YQ4/IXeiT5ge3hobDGag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt5VF-00F4fd-JI; Fri, 03 Dec 2021 10:09:17 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt5VB-00F4f5-CQ for linux-arm-kernel@lists.infradead.org; Fri, 03 Dec 2021 10:09:15 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id CF4C1B8266A; Fri, 3 Dec 2021 10:09:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4C7DC53FAD; Fri, 3 Dec 2021 10:09:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638526150; bh=giWliqDtcbcFEaBnRapw8BxN8BkiDMRFF8tFhPBAno4=; h=From:To:Cc:Subject:Date:From; b=FZqXb8yk0n4NwJAY73UrqFdBFuuIXYSRizgVKLfLP+W1l9+9uBSKwet7asNqr3sny oU1nMTvZPQTzXP2xnc0qfV1+kZnddPlIjiTMWj8cWqB8dWApktsDH02oasaxDMfeME v8AGwoKSyejXeY5czQx5jnTYWVLIIZxjhlKZb9EY4lgbnSyZAJLzgW0RN4XglYBqRY o9IWg4Z9i75TLR/r05DC2P0LQOhbtWh2jG7qRqZtorNuoIYgrFj4Sm2aMpJOo0sOql Bm8zm4kquzmax1P18Lb3Raib/WP9S1Qil4EGp1z2mF8Yj1XXxqRwIkx2HsLFTL9/dM qYWiVtf40Pejg== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Nicolas Pitre , Arnd Bergmann , Kees Cook , Keith Packard , Linus Walleij , Nick Desaulniers , Tony Lindgren , Marc Zyngier , Vladimir Murzin , Jesse Taube Subject: [PATCH v3 00/14] ARM: enable IRQ stacks and vmap'ed stacks for UP Date: Fri, 3 Dec 2021 11:08:49 +0100 Message-Id: <20211203100903.334206-1-ardb@kernel.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6437; h=from:subject; bh=giWliqDtcbcFEaBnRapw8BxN8BkiDMRFF8tFhPBAno4=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBhqeydaK+JxeJjJXNxT1WJAGHd2TDw9OIgrJWke/Ma ErtTXraJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYansnQAKCRDDTyI5ktmPJG7XC/ 95WPwUmXob0vINYN57JKHYR2YuYBd+p2emyj1Xa9AVyEct+50Z5U1XUzQmWg3QR7K55IXPSMgRLn/J iCJDAEDTgtLx0C/C1Ma0Wl7mHkKMz76fLFfMQpzOw6UVznbCUq4YmrdQCKX6QhR/FgtLenf0DWr6G5 kDsDETLXwMn5QbswMdqwby+xzoVwMi8hCpAef7MJxXMTb4ps+u+AYutWXqjMbyPCRt18A/Dc5p3AHB NfNh8jGibi7astZ6GIVH9vYve+tljiLa+RHJPJ2BM5jNvPPdg8uIEHdcleDA81lCdz6H9WlfjHthzP qO/bGl8lOrHCTBzbvUMoNiuZLUVx+XE+wVF6J5hYgGsm1qEeH2+P9P3T2qcQ3YXPB8y/++b+dAbW4W G6uQ7HE0HSO/ei1+8ZhskgoWtjubFRrs9d4Qv6DpTN0CDIQ85RNpWuHCd2+dmlvsRExOKdE073lB6W 3srg9OwKLK9aIt+f9NUKKYzDT6l4Dn2cST6Ap8bSZ3Ndc= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211203_020913_760095_EF716673 X-CRM114-Status: GOOD ( 25.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org First, enable the use of the TLS register to hold the 'current' pointer for all configurations that can support it, including non-SMP ones that target v6k or later CPUs, and multi-platform SMP ones that also support v6 based UP systems. The remaining configurations are all strictly UP, which means we can switch to a global variable to hold the current pointer. By doing this, we can enable THREAD_INFO_IN_TASK, which moves thread info off the stack, protecting it from overflows. It also permits us to enable IRQ stacks and vmap'ed stacks for UP configurations as well. Supporting v6 cores without SMP extensions in SMP configurations (e.g., omap2plus_defconfig or imx_v6_v7_defconfig) makes this a bit tricky, and this is a feature we may consider dropping entirely in the future. But for the time being, we can support this mode as well. The accesses to the global variable holding 'current' are constructed in a way that ensures that no literal pool accesses (and associated D-cache misses) are needed unless the access is from a module and module PLTs are enabled. This means that accessing 'current' is just as costly as before, as it used to require some arithmetic involving the stack pointer and a load from the thread_info::task field. However, accessing thread_info itself now also involves a load, although it should be noted that all thread_info and current accesses now go via the same variable, which is therefore expected to be hot in the caches at all times. Changes since v2: - support THREAD_INFO_IN_TASK and the IRQ stack on v7m as well, - incorporate a v7m cleanup from Vladimir to enable the above, - avoid declaring smp_on_up globally, - fix an oversight in the IOP32x IRQ #0 fix - add some more acks Changes since RFC/v1: - add five preparatory patches that move RiscPC, IOP32x and Footbridge to GENERIC_IRQ_MULTI_HANDLER so that even these ancient platforms can benefit from the IRQ stacks changes for UP that this series proposes (contributed by Arnd) - fix various issues related to SMP+v6 corner cases that were caught by kernelci testing; - add acks from Nico and Linus (thanks!) Cc: Russell King Cc: Nicolas Pitre Cc: Arnd Bergmann Cc: Kees Cook Cc: Keith Packard Cc: Linus Walleij Cc: Nick Desaulniers Cc: Tony Lindgren Cc: Marc Zyngier Cc: Vladimir Murzin Cc: Jesse Taube Ard Biesheuvel (8): ARM: entry: preserve thread_info pointer in switch_to ARM: module: implement support for PC-relative group relocations ARM: assembler: add optimized ldr/str macros to load variables from memory ARM: percpu: add SMP_ON_UP support ARM: use TLS register for 'current' on !SMP as well ARM: smp: defer TPIDRURO update for SMP v6 configurations too ARM: implement THREAD_INFO_IN_TASK for uniprocessor systems ARM: v7m: enable support for IRQ stacks Arnd Bergmann (5): ARM: riscpc: use GENERIC_IRQ_MULTI_HANDLER ARM: footbridge: use GENERIC_IRQ_MULTI_HANDLER ARM: iop32x: offset IRQ numbers by 1 ARM: iop32x: use GENERIC_IRQ_MULTI_HANDLER ARM: remove old-style irq entry Vladimir Murzin (1): irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER arch/arm/Kconfig | 22 +-- arch/arm/include/asm/assembler.h | 185 ++++++++++++++++---- arch/arm/include/asm/current.h | 37 ++-- arch/arm/include/asm/elf.h | 3 + arch/arm/include/asm/entry-macro-multi.S | 16 -- arch/arm/include/asm/hardware/entry-macro-iomd.S | 131 -------------- arch/arm/include/asm/insn.h | 24 +++ arch/arm/include/asm/irq.h | 1 - arch/arm/include/asm/mach/arch.h | 2 - arch/arm/include/asm/percpu.h | 25 ++- arch/arm/include/asm/switch_to.h | 3 +- arch/arm/include/asm/thread_info.h | 27 --- arch/arm/include/asm/tls.h | 13 +- arch/arm/include/asm/v7m.h | 3 +- arch/arm/kernel/asm-offsets.c | 3 - arch/arm/kernel/entry-armv.S | 48 ++--- arch/arm/kernel/entry-common.S | 16 +- arch/arm/kernel/entry-header.S | 13 +- arch/arm/kernel/entry-v7m.S | 39 +++-- arch/arm/kernel/head-common.S | 4 +- arch/arm/kernel/irq.c | 17 -- arch/arm/kernel/module.c | 63 +++++++ arch/arm/kernel/process.c | 7 +- arch/arm/kernel/sleep.S | 4 +- arch/arm/kernel/smp.c | 11 ++ arch/arm/kernel/traps.c | 4 + arch/arm/mach-footbridge/common.c | 87 +++++++++ arch/arm/mach-footbridge/include/mach/entry-macro.S | 107 ----------- arch/arm/mach-iop32x/cp6.c | 10 +- arch/arm/mach-iop32x/include/mach/entry-macro.S | 31 ---- arch/arm/mach-iop32x/include/mach/irqs.h | 2 +- arch/arm/mach-iop32x/iop3xx.h | 1 + arch/arm/mach-iop32x/irq.c | 29 ++- arch/arm/mach-iop32x/irqs.h | 60 ++++--- arch/arm/mach-rpc/fiq.S | 5 +- arch/arm/mach-rpc/include/mach/entry-macro.S | 13 -- arch/arm/mach-rpc/irq.c | 145 +++++++++++++++ arch/arm/mm/Kconfig | 1 + drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-nvic.c | 22 +-- 40 files changed, 695 insertions(+), 540 deletions(-) delete mode 100644 arch/arm/include/asm/entry-macro-multi.S delete mode 100644 arch/arm/include/asm/hardware/entry-macro-iomd.S delete mode 100644 arch/arm/mach-footbridge/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-iop32x/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-rpc/include/mach/entry-macro.S -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel