From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F37DC433F5 for ; Fri, 3 Dec 2021 12:03:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1380672AbhLCMGY (ORCPT ); Fri, 3 Dec 2021 07:06:24 -0500 Received: from smtp2.axis.com ([195.60.68.18]:28139 "EHLO smtp2.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230154AbhLCMGX (ORCPT ); Fri, 3 Dec 2021 07:06:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axis.com; q=dns/txt; s=axis-central1; t=1638532980; x=1670068980; h=date:to:cc:subject:message-id:references:mime-version: content-transfer-encoding:in-reply-to:from; bh=yj/0xNzd5mKJtxPQc4qwK79KpAgK+A6FMJkVDzGH4Bk=; b=MsTxrN8hYYCRgGPPStN2DTIQ4TSW+Kkg6GSE5LWOGVN/vvfurrb/0Iqr UJ0eCbBkqp3gni6PNnGHTlRd60PKQMDq6iRiPJIkSpD7BX0i8HPNQ8Mec vs6BQTtD2CEqcbMBFcMCXginHvDfUirfzCujtwtJ5ana2FrfjbWGhMCd5 RVQsosljlrJZLsp1HOcrWPUfOpnJk8y0TsCnx0rlpRc71QnWlCSdhUVJG RoETOfg9ka1fHIfy6kUcuDkTW1o2B+CxHYOoiu3Sd1m3DPyQIxKC7KYZ8 8Mhky6Np1MYgIrhlFFDF8hzqiU7jc4oFw0F7gfgoWKOqpK8izvZsn1Bbd g==; Date: Fri, 3 Dec 2021 13:02:58 +0100 To: Krzysztof Kozlowski CC: =?iso-8859-1?Q?M=E5rten?= Lindahl , Ulf Hansson , Rob Herring , Jaehoon Chung , Doug Anderson , kernel , "linux-mmc@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-samsung-soc@vger.kernel.org" Subject: Re: [PATCH 3/4] mmc: dw_mmc: Add quirk for extended data read timeout Message-ID: <20211203120258.GB23260@axis.com> References: <20211201153804.27655-1-marten.lindahl@axis.com> <20211201153804.27655-4-marten.lindahl@axis.com> <2875d5c8-dc98-0e3c-41b8-c71bd439ced4@canonical.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <2875d5c8-dc98-0e3c-41b8-c71bd439ced4@canonical.com> User-Agent: Mutt/1.10.1 (2018-07-13) From: Marten Lindahl Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Dec 02, 2021 at 09:39:30AM +0100, Krzysztof Kozlowski wrote: Hi Krzysztof! Thanks for looking at this! > On 01/12/2021 16:38, Mårten Lindahl wrote: > > Current dw_mci driver supports a TMOUT register which consists of a 24 > > bit field (TMOUT[31:8]) for the DATA_TIMEOUT. The maximum value of this > > field is 0xFFFFFF, which with a 200MHz clock will give a full DRTO of: > > > > 0xFFFFFF / 200000000 => ~84 ms > > > > However, the ARTPEC-8 SoC DWMMC IP version has a TMOUT register with an > > extended DATA_TIMEOUT field, which supports longer timers for the DRTO. > > In this version the DATA_TIMEOUT field is split into two, which with the > > same 200MHz clock as above will allow a maximum timeout of: > > > > ((TMOUT[10:8] -1) * 0xFFFFFF + TMOUT[31:11] * 8) / 200000000 => ~587 ms > > > > Add a quirk to support this. The quirk is enabled for ARTPEC-8 SoCs. > > > > Signed-off-by: Mårten Lindahl > > --- > > drivers/mmc/host/dw_mmc-exynos.c | 5 +++++ > > drivers/mmc/host/dw_mmc.c | 33 ++++++++++++++++++++++++++++---- > > drivers/mmc/host/dw_mmc.h | 7 +++++++ > > 3 files changed, 41 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c > > index cae7c94b5d6e..6ae9c0ec1282 100644 > > --- a/drivers/mmc/host/dw_mmc-exynos.c > > +++ b/drivers/mmc/host/dw_mmc-exynos.c > > @@ -127,6 +127,11 @@ static int dw_mci_exynos_priv_init(struct dw_mci *host) > > DQS_CTRL_GET_RD_DELAY(priv->saved_strobe_ctrl); > > } > > > > + if (priv->ctrl_type == DW_MCI_TYPE_ARTPEC8) { > > + /* Quirk needed for ARTPEC-8 SoCs */ > > + host->quirks |= DW_MMC_QUIRK_EXTENDED_TMOUT; > > + } > > + > > host->bus_hz /= (priv->ciu_div + 1); > > > > return 0; > > diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c > > index f2a14a434bef..45ea9fd97a6a 100644 > > --- a/drivers/mmc/host/dw_mmc.c > > +++ b/drivers/mmc/host/dw_mmc.c > > @@ -1289,6 +1289,7 @@ static void dw_mci_set_data_timeout(struct dw_mci *host, > > { > > u32 clk_div, tmout; > > u64 tmp; > > + unsigned int tmp2; > > > > clk_div = (mci_readl(host, CLKDIV) & 0xFF) * 2; > > if (clk_div == 0) > > @@ -1301,10 +1302,28 @@ static void dw_mci_set_data_timeout(struct dw_mci *host, > > tmout = 0xFF; /* Set maximum */ > > > > /* TMOUT[31:8] (DATA_TIMEOUT) */ > > - if (!tmp || tmp > 0xFFFFFF) > > - tmout |= (0xFFFFFF << 8); > > - else > > - tmout |= (tmp & 0xFFFFFF) << 8; > > + if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) { > > + /* > > + * Extended HW timer (max = 0x6FFFFF2): > > + * ((TMOUT[10:8] - 1) * 0xFFFFFF + TMOUT[31:11] * 8) > > + */ > > + if (!tmp || tmp > 0x6FFFFF2) > > + tmout |= (0xFFFFFF << 8); > > + else { > > + /* TMOUT[10:8] */ > > + tmp2 = (((unsigned int)tmp / 0xFFFFFF) + 1) & 0x7; > > + tmout |= tmp2 << 8; > > + > > + /* TMOUT[31:11] */ > > + tmp = tmp - ((tmp2 - 1) * 0xFFFFFF); > > + tmout |= (tmp & 0xFFFFF8) << 8; > > + } > > + } else { > > + if (!tmp || tmp > 0xFFFFFF) > > + tmout |= (0xFFFFFF << 8); > > + else > > + tmout |= (tmp & 0xFFFFFF) << 8; > > + } > > > > mci_writel(host, TMOUT, tmout); > > dev_dbg(host->dev, "timeout_ns: %u => TMOUT[31:8]: 0x%#08x", > > @@ -2005,9 +2024,15 @@ static void dw_mci_set_drto(struct dw_mci *host) > > if (drto_div == 0) > > drto_div = 1; > > > > + if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) > > + drto_clks = (((drto_clks & 0x7) - 1) * 0xFFFFFF) + > > + ((drto_clks & 0xFFFFF8)); > > + > > drto_ms = DIV_ROUND_UP_ULL((u64)MSEC_PER_SEC * drto_clks * drto_div, > > host->bus_hz); > > > > + dev_dbg(host->dev, "drto_ms: %u\n", drto_ms); > > + > > /* add a bit spare time */ > > drto_ms += 10; > > > > diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h > > index 771d5afa3136..071f4479f166 100644 > > --- a/drivers/mmc/host/dw_mmc.h > > +++ b/drivers/mmc/host/dw_mmc.h > > @@ -118,6 +118,7 @@ struct dw_mci_dma_slave { > > * @part_buf: Simple buffer for partial fifo reads/writes. > > * @push_data: Pointer to FIFO push function. > > * @pull_data: Pointer to FIFO pull function. > > + * @quirks: Set of quirks that apply to specific versions of the IP. > > * @vqmmc_enabled: Status of vqmmc, should be true or false. > > * @irq_flags: The flags to be passed to request_irq. > > * @irq: The irq value to be passed to request_irq. > > @@ -223,6 +224,9 @@ struct dw_mci { > > void (*push_data)(struct dw_mci *host, void *buf, int cnt); > > void (*pull_data)(struct dw_mci *host, void *buf, int cnt); > > > > + /* Workaround flags */ > > No need for this comment - you already described the field in kerneldoc. Ok, will remove it. > > > + u32 quirks; > > + > > bool vqmmc_enabled; > > unsigned long irq_flags; /* IRQ flags */ > > int irq; > > @@ -274,6 +278,9 @@ struct dw_mci_board { > > struct dma_pdata *data; > > }; > > > > +/* Support for longer data read timeout */ > > +#define DW_MMC_QUIRK_EXTENDED_TMOUT (1<<0) > > BIT() Will fix. > > > + > > #define DW_MMC_240A 0x240a > > #define DW_MMC_280A 0x280a > > > > > Kind regards Mårten > > Best regards, > Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C301AC433EF for ; Fri, 3 Dec 2021 12:04:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:From:In-Reply-To:MIME-Version: References:Message-ID:Subject:CC:To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=NbkXeRTRHf3l8yt+13ZqLifDx7poxcCdiHJAjBL3oyo=; b=qpRbMpG4PauXGfun2F/nypTY+s /yn1X/ih8nAxNSVJ64xFjfNp+Hl7ZLjbnjoTAMb1Fq6GHsaXnSj2yIGkynC4wUcHJyFXwQunxcB1T v73b79A4Ej+W5OpwvRC250QL+lq54UK2QJFvcQiGsLYT4c2eGmeMjvJQfe23z317JkKe+R1oFnbhu ccAx7xTq6jxP1TZ8wEi9ci5YxXOXo4Ehqlx999iQT75p7KybI5dbQHT4sSFa8CVd1ggPoaQPpEtGe B50Y3XH2QCRzUg/VGpN3oUwA/z0953PjeA+2e+//aVVTAR7avQ42pzssIekWFqQrCM/1vCSrTKZHP GeqtyjGA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt7HQ-00FbCi-BS; Fri, 03 Dec 2021 12:03:08 +0000 Received: from smtp2.axis.com ([195.60.68.18]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt7HI-00FbA8-I6 for linux-arm-kernel@lists.infradead.org; Fri, 03 Dec 2021 12:03:03 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axis.com; q=dns/txt; s=axis-central1; t=1638532980; x=1670068980; h=date:to:cc:subject:message-id:references:mime-version: content-transfer-encoding:in-reply-to:from; bh=yj/0xNzd5mKJtxPQc4qwK79KpAgK+A6FMJkVDzGH4Bk=; b=MsTxrN8hYYCRgGPPStN2DTIQ4TSW+Kkg6GSE5LWOGVN/vvfurrb/0Iqr UJ0eCbBkqp3gni6PNnGHTlRd60PKQMDq6iRiPJIkSpD7BX0i8HPNQ8Mec vs6BQTtD2CEqcbMBFcMCXginHvDfUirfzCujtwtJ5ana2FrfjbWGhMCd5 RVQsosljlrJZLsp1HOcrWPUfOpnJk8y0TsCnx0rlpRc71QnWlCSdhUVJG RoETOfg9ka1fHIfy6kUcuDkTW1o2B+CxHYOoiu3Sd1m3DPyQIxKC7KYZ8 8Mhky6Np1MYgIrhlFFDF8hzqiU7jc4oFw0F7gfgoWKOqpK8izvZsn1Bbd g==; Date: Fri, 3 Dec 2021 13:02:58 +0100 To: Krzysztof Kozlowski CC: =?iso-8859-1?Q?M=E5rten?= Lindahl , Ulf Hansson , Rob Herring , Jaehoon Chung , Doug Anderson , kernel , "linux-mmc@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-samsung-soc@vger.kernel.org" Subject: Re: [PATCH 3/4] mmc: dw_mmc: Add quirk for extended data read timeout Message-ID: <20211203120258.GB23260@axis.com> References: <20211201153804.27655-1-marten.lindahl@axis.com> <20211201153804.27655-4-marten.lindahl@axis.com> <2875d5c8-dc98-0e3c-41b8-c71bd439ced4@canonical.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2875d5c8-dc98-0e3c-41b8-c71bd439ced4@canonical.com> User-Agent: Mutt/1.10.1 (2018-07-13) From: Marten Lindahl X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211203_040300_982361_27DAC1AA X-CRM114-Status: GOOD ( 30.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Dec 02, 2021 at 09:39:30AM +0100, Krzysztof Kozlowski wrote: Hi Krzysztof! Thanks for looking at this! > On 01/12/2021 16:38, M=E5rten Lindahl wrote: > > Current dw_mci driver supports a TMOUT register which consists of a 24 > > bit field (TMOUT[31:8]) for the DATA_TIMEOUT. The maximum value of this > > field is 0xFFFFFF, which with a 200MHz clock will give a full DRTO of: > > = > > 0xFFFFFF / 200000000 =3D> ~84 ms > > = > > However, the ARTPEC-8 SoC DWMMC IP version has a TMOUT register with an > > extended DATA_TIMEOUT field, which supports longer timers for the DRTO. > > In this version the DATA_TIMEOUT field is split into two, which with the > > same 200MHz clock as above will allow a maximum timeout of: > > = > > ((TMOUT[10:8] -1) * 0xFFFFFF + TMOUT[31:11] * 8) / 200000000 =3D> ~587 = ms > > = > > Add a quirk to support this. The quirk is enabled for ARTPEC-8 SoCs. > > = > > Signed-off-by: M=E5rten Lindahl > > --- > > drivers/mmc/host/dw_mmc-exynos.c | 5 +++++ > > drivers/mmc/host/dw_mmc.c | 33 ++++++++++++++++++++++++++++---- > > drivers/mmc/host/dw_mmc.h | 7 +++++++ > > 3 files changed, 41 insertions(+), 4 deletions(-) > > = > > diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc= -exynos.c > > index cae7c94b5d6e..6ae9c0ec1282 100644 > > --- a/drivers/mmc/host/dw_mmc-exynos.c > > +++ b/drivers/mmc/host/dw_mmc-exynos.c > > @@ -127,6 +127,11 @@ static int dw_mci_exynos_priv_init(struct dw_mci *= host) > > DQS_CTRL_GET_RD_DELAY(priv->saved_strobe_ctrl); > > } > > = > > + if (priv->ctrl_type =3D=3D DW_MCI_TYPE_ARTPEC8) { > > + /* Quirk needed for ARTPEC-8 SoCs */ > > + host->quirks |=3D DW_MMC_QUIRK_EXTENDED_TMOUT; > > + } > > + > > host->bus_hz /=3D (priv->ciu_div + 1); > > = > > return 0; > > diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c > > index f2a14a434bef..45ea9fd97a6a 100644 > > --- a/drivers/mmc/host/dw_mmc.c > > +++ b/drivers/mmc/host/dw_mmc.c > > @@ -1289,6 +1289,7 @@ static void dw_mci_set_data_timeout(struct dw_mci= *host, > > { > > u32 clk_div, tmout; > > u64 tmp; > > + unsigned int tmp2; > > = > > clk_div =3D (mci_readl(host, CLKDIV) & 0xFF) * 2; > > if (clk_div =3D=3D 0) > > @@ -1301,10 +1302,28 @@ static void dw_mci_set_data_timeout(struct dw_m= ci *host, > > tmout =3D 0xFF; /* Set maximum */ > > = > > /* TMOUT[31:8] (DATA_TIMEOUT) */ > > - if (!tmp || tmp > 0xFFFFFF) > > - tmout |=3D (0xFFFFFF << 8); > > - else > > - tmout |=3D (tmp & 0xFFFFFF) << 8; > > + if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) { > > + /* > > + * Extended HW timer (max =3D 0x6FFFFF2): > > + * ((TMOUT[10:8] - 1) * 0xFFFFFF + TMOUT[31:11] * 8) > > + */ > > + if (!tmp || tmp > 0x6FFFFF2) > > + tmout |=3D (0xFFFFFF << 8); > > + else { > > + /* TMOUT[10:8] */ > > + tmp2 =3D (((unsigned int)tmp / 0xFFFFFF) + 1) & 0x7; > > + tmout |=3D tmp2 << 8; > > + > > + /* TMOUT[31:11] */ > > + tmp =3D tmp - ((tmp2 - 1) * 0xFFFFFF); > > + tmout |=3D (tmp & 0xFFFFF8) << 8; > > + } > > + } else { > > + if (!tmp || tmp > 0xFFFFFF) > > + tmout |=3D (0xFFFFFF << 8); > > + else > > + tmout |=3D (tmp & 0xFFFFFF) << 8; > > + } > > = > > mci_writel(host, TMOUT, tmout); > > dev_dbg(host->dev, "timeout_ns: %u =3D> TMOUT[31:8]: 0x%#08x", > > @@ -2005,9 +2024,15 @@ static void dw_mci_set_drto(struct dw_mci *host) > > if (drto_div =3D=3D 0) > > drto_div =3D 1; > > = > > + if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) > > + drto_clks =3D (((drto_clks & 0x7) - 1) * 0xFFFFFF) + > > + ((drto_clks & 0xFFFFF8)); > > + > > drto_ms =3D DIV_ROUND_UP_ULL((u64)MSEC_PER_SEC * drto_clks * drto_div, > > host->bus_hz); > > = > > + dev_dbg(host->dev, "drto_ms: %u\n", drto_ms); > > + > > /* add a bit spare time */ > > drto_ms +=3D 10; > > = > > diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h > > index 771d5afa3136..071f4479f166 100644 > > --- a/drivers/mmc/host/dw_mmc.h > > +++ b/drivers/mmc/host/dw_mmc.h > > @@ -118,6 +118,7 @@ struct dw_mci_dma_slave { > > * @part_buf: Simple buffer for partial fifo reads/writes. > > * @push_data: Pointer to FIFO push function. > > * @pull_data: Pointer to FIFO pull function. > > + * @quirks: Set of quirks that apply to specific versions of the IP. > > * @vqmmc_enabled: Status of vqmmc, should be true or false. > > * @irq_flags: The flags to be passed to request_irq. > > * @irq: The irq value to be passed to request_irq. > > @@ -223,6 +224,9 @@ struct dw_mci { > > void (*push_data)(struct dw_mci *host, void *buf, int cnt); > > void (*pull_data)(struct dw_mci *host, void *buf, int cnt); > > = > > + /* Workaround flags */ > = > No need for this comment - you already described the field in kerneldoc. Ok, will remove it. > = > > + u32 quirks; > > + > > bool vqmmc_enabled; > > unsigned long irq_flags; /* IRQ flags */ > > int irq; > > @@ -274,6 +278,9 @@ struct dw_mci_board { > > struct dma_pdata *data; > > }; > > = > > +/* Support for longer data read timeout */ > > +#define DW_MMC_QUIRK_EXTENDED_TMOUT (1<<0) > = > BIT() Will fix. > = > > + > > #define DW_MMC_240A 0x240a > > #define DW_MMC_280A 0x280a > > = > > = > = Kind regards M=E5rten > = > Best regards, > Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel