From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5BDABC433EF for ; Mon, 6 Dec 2021 15:39:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=f+kxLjiXWi6pS8CM1C/Ai7VqpfflG61Z+9nw9qd0NaA=; b=nLTY9T7jJTYFnx D3AqCIoppWcVr/N7+7xMAuMdxSA3+5x1bt3nnFIObOM6VYllLkESV9rJe1H5+LNFnSYo2F2iiQj11 fHkdQS7XHSZ5VidcLu6DsnHXEbpa4ylyMUfoIsRoFtipNvaar0/6MRp0RmIv5jmjawsTcd5FbM2Dm VK/Gm6AhGnLj9d1HFd4Lu7Yrnogt/xVHwrzejQXuutsWPMTQL32weibjUXcpyL9ZVpIDxRdMRaleq tf2JFPAjkDR358gdMV00nXzqQJbwJSNvJ6VF2ZDmCZi2nJ9MiwYHtcw50CR4dF9nkrdDqn5zKSt+b U3rfLac/BoGjZuFlY/YQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1muG3T-004Zqr-7U; Mon, 06 Dec 2021 15:37:27 +0000 Received: from mga05.intel.com ([192.55.52.43]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1muG3M-004Zp7-Uz for linux-arm-kernel@lists.infradead.org; Mon, 06 Dec 2021 15:37:22 +0000 X-IronPort-AV: E=McAfee;i="6200,9189,10189"; a="323591800" X-IronPort-AV: E=Sophos;i="5.87,291,1631602800"; d="scan'208";a="323591800" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Dec 2021 07:37:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,291,1631602800"; d="scan'208";a="611276566" Received: from lkp-server02.sh.intel.com (HELO 9e1e9f9b3bcb) ([10.239.97.151]) by orsmga004.jf.intel.com with ESMTP; 06 Dec 2021 07:37:11 -0800 Received: from kbuild by 9e1e9f9b3bcb with local (Exim 4.92) (envelope-from ) id 1muG3C-000LPW-8u; Mon, 06 Dec 2021 15:37:10 +0000 Date: Mon, 6 Dec 2021 23:36:39 +0800 From: kernel test robot To: Sai Prakash Ranjan , Will Deacon , Catalin Marinas , Arnd Bergmann , Steven Rostedt , Marc Zyngier Cc: kbuild-all@lists.01.org, gregkh , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, quic_psodagud@quicinc.com Subject: Re: [PATCHv5 1/4] arm64: io: Use asm-generic high level MMIO accessors Message-ID: <202112062304.8qIQUQyF-lkp@intel.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211206_073721_102050_D89F5156 X-CRM114-Status: GOOD ( 13.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Sai, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on arm64/for-next/core] [also build test WARNING on rostedt-trace/for-next arnd-asm-generic/master arm-perf/for-next/perf v5.16-rc4 next-20211206] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Sai-Prakash-Ranjan/tracing-rwmmio-arm64-Add-support-to-trace-register-reads-writes/20211206-163212 base: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/core config: arm64-randconfig-r014-20211206 (https://download.01.org/0day-ci/archive/20211206/202112062304.8qIQUQyF-lkp@intel.com/config) compiler: aarch64-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/0775ecf0f452d6b76b161d009dab52c90270755a git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Sai-Prakash-Ranjan/tracing-rwmmio-arm64-Add-support-to-trace-register-reads-writes/20211206-163212 git checkout 0775ecf0f452d6b76b161d009dab52c90270755a # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/gpu/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): In file included from drivers/gpu/drm/meson/meson_viu.c:16: drivers/gpu/drm/meson/meson_viu.c: In function 'meson_viu_init': >> drivers/gpu/drm/meson/meson_registers.h:1826:55: warning: conversion from 'long unsigned int' to 'u32' {aka 'unsigned int'} changes value from '18446744071814774785' to '2400190465' [-Woverflow] 1826 | #define VIU_OSD_BLEND_REORDER(dest, src) ((src) << (dest * 4)) | ^ drivers/gpu/drm/meson/meson_viu.c:472:32: note: in expansion of macro 'VIU_OSD_BLEND_REORDER' 472 | writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) | | ^~~~~~~~~~~~~~~~~~~~~ vim +1826 drivers/gpu/drm/meson/meson_registers.h b93a66faeea9ddf Neil Armstrong 2019-03-25 1824 b93a66faeea9ddf Neil Armstrong 2019-03-25 1825 #define VIU_OSD_BLEND_CTRL 0x39b0 147ae1cbaa18429 Julien Masson 2019-06-24 @1826 #define VIU_OSD_BLEND_REORDER(dest, src) ((src) << (dest * 4)) 147ae1cbaa18429 Julien Masson 2019-06-24 1827 #define VIU_OSD_BLEND_DIN_EN(bits) ((bits & 0xf) << 20) 147ae1cbaa18429 Julien Masson 2019-06-24 1828 #define VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 BIT(24) 147ae1cbaa18429 Julien Masson 2019-06-24 1829 #define VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 BIT(25) 147ae1cbaa18429 Julien Masson 2019-06-24 1830 #define VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 BIT(26) 147ae1cbaa18429 Julien Masson 2019-06-24 1831 #define VIU_OSD_BLEND_BLEN2_PREMULT_EN(input) ((input & 0x3) << 27) 147ae1cbaa18429 Julien Masson 2019-06-24 1832 #define VIU_OSD_BLEND_HOLD_LINES(lines) ((lines & 0x7) << 29) b93a66faeea9ddf Neil Armstrong 2019-03-25 1833 #define VIU_OSD_BLEND_CTRL1 0x39c0 b93a66faeea9ddf Neil Armstrong 2019-03-25 1834 #define VIU_OSD_BLEND_DIN0_SCOPE_H 0x39b1 b93a66faeea9ddf Neil Armstrong 2019-03-25 1835 #define VIU_OSD_BLEND_DIN0_SCOPE_V 0x39b2 b93a66faeea9ddf Neil Armstrong 2019-03-25 1836 #define VIU_OSD_BLEND_DIN1_SCOPE_H 0x39b3 b93a66faeea9ddf Neil Armstrong 2019-03-25 1837 #define VIU_OSD_BLEND_DIN1_SCOPE_V 0x39b4 b93a66faeea9ddf Neil Armstrong 2019-03-25 1838 #define VIU_OSD_BLEND_DIN2_SCOPE_H 0x39b5 b93a66faeea9ddf Neil Armstrong 2019-03-25 1839 #define VIU_OSD_BLEND_DIN2_SCOPE_V 0x39b6 b93a66faeea9ddf Neil Armstrong 2019-03-25 1840 #define VIU_OSD_BLEND_DIN3_SCOPE_H 0x39b7 b93a66faeea9ddf Neil Armstrong 2019-03-25 1841 #define VIU_OSD_BLEND_DIN3_SCOPE_V 0x39b8 b93a66faeea9ddf Neil Armstrong 2019-03-25 1842 #define VIU_OSD_BLEND_DUMMY_DATA0 0x39b9 b93a66faeea9ddf Neil Armstrong 2019-03-25 1843 #define VIU_OSD_BLEND_DUMMY_ALPHA 0x39ba b93a66faeea9ddf Neil Armstrong 2019-03-25 1844 #define VIU_OSD_BLEND_BLEND0_SIZE 0x39bb b93a66faeea9ddf Neil Armstrong 2019-03-25 1845 #define VIU_OSD_BLEND_BLEND1_SIZE 0x39bc b93a66faeea9ddf Neil Armstrong 2019-03-25 1846 #define VIU_OSD_BLEND_RO_CURRENT_XY 0x39bf b93a66faeea9ddf Neil Armstrong 2019-03-25 1847 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DAD0C4332F for ; Mon, 6 Dec 2021 15:41:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386012AbhLFPow (ORCPT ); Mon, 6 Dec 2021 10:44:52 -0500 Received: from mga03.intel.com ([134.134.136.65]:6476 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1389662AbhLFPkr (ORCPT ); Mon, 6 Dec 2021 10:40:47 -0500 X-IronPort-AV: E=McAfee;i="6200,9189,10189"; a="237279939" X-IronPort-AV: E=Sophos;i="5.87,291,1631602800"; d="scan'208";a="237279939" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Dec 2021 07:37:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,291,1631602800"; d="scan'208";a="611276566" Received: from lkp-server02.sh.intel.com (HELO 9e1e9f9b3bcb) ([10.239.97.151]) by orsmga004.jf.intel.com with ESMTP; 06 Dec 2021 07:37:11 -0800 Received: from kbuild by 9e1e9f9b3bcb with local (Exim 4.92) (envelope-from ) id 1muG3C-000LPW-8u; Mon, 06 Dec 2021 15:37:10 +0000 Date: Mon, 6 Dec 2021 23:36:39 +0800 From: kernel test robot To: Sai Prakash Ranjan , Will Deacon , Catalin Marinas , Arnd Bergmann , Steven Rostedt , Marc Zyngier Cc: kbuild-all@lists.01.org, gregkh , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, quic_psodagud@quicinc.com Subject: Re: [PATCHv5 1/4] arm64: io: Use asm-generic high level MMIO accessors Message-ID: <202112062304.8qIQUQyF-lkp@intel.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi Sai, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on arm64/for-next/core] [also build test WARNING on rostedt-trace/for-next arnd-asm-generic/master arm-perf/for-next/perf v5.16-rc4 next-20211206] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Sai-Prakash-Ranjan/tracing-rwmmio-arm64-Add-support-to-trace-register-reads-writes/20211206-163212 base: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/core config: arm64-randconfig-r014-20211206 (https://download.01.org/0day-ci/archive/20211206/202112062304.8qIQUQyF-lkp@intel.com/config) compiler: aarch64-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/0775ecf0f452d6b76b161d009dab52c90270755a git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Sai-Prakash-Ranjan/tracing-rwmmio-arm64-Add-support-to-trace-register-reads-writes/20211206-163212 git checkout 0775ecf0f452d6b76b161d009dab52c90270755a # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/gpu/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): In file included from drivers/gpu/drm/meson/meson_viu.c:16: drivers/gpu/drm/meson/meson_viu.c: In function 'meson_viu_init': >> drivers/gpu/drm/meson/meson_registers.h:1826:55: warning: conversion from 'long unsigned int' to 'u32' {aka 'unsigned int'} changes value from '18446744071814774785' to '2400190465' [-Woverflow] 1826 | #define VIU_OSD_BLEND_REORDER(dest, src) ((src) << (dest * 4)) | ^ drivers/gpu/drm/meson/meson_viu.c:472:32: note: in expansion of macro 'VIU_OSD_BLEND_REORDER' 472 | writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) | | ^~~~~~~~~~~~~~~~~~~~~ vim +1826 drivers/gpu/drm/meson/meson_registers.h b93a66faeea9ddf Neil Armstrong 2019-03-25 1824 b93a66faeea9ddf Neil Armstrong 2019-03-25 1825 #define VIU_OSD_BLEND_CTRL 0x39b0 147ae1cbaa18429 Julien Masson 2019-06-24 @1826 #define VIU_OSD_BLEND_REORDER(dest, src) ((src) << (dest * 4)) 147ae1cbaa18429 Julien Masson 2019-06-24 1827 #define VIU_OSD_BLEND_DIN_EN(bits) ((bits & 0xf) << 20) 147ae1cbaa18429 Julien Masson 2019-06-24 1828 #define VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 BIT(24) 147ae1cbaa18429 Julien Masson 2019-06-24 1829 #define VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 BIT(25) 147ae1cbaa18429 Julien Masson 2019-06-24 1830 #define VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 BIT(26) 147ae1cbaa18429 Julien Masson 2019-06-24 1831 #define VIU_OSD_BLEND_BLEN2_PREMULT_EN(input) ((input & 0x3) << 27) 147ae1cbaa18429 Julien Masson 2019-06-24 1832 #define VIU_OSD_BLEND_HOLD_LINES(lines) ((lines & 0x7) << 29) b93a66faeea9ddf Neil Armstrong 2019-03-25 1833 #define VIU_OSD_BLEND_CTRL1 0x39c0 b93a66faeea9ddf Neil Armstrong 2019-03-25 1834 #define VIU_OSD_BLEND_DIN0_SCOPE_H 0x39b1 b93a66faeea9ddf Neil Armstrong 2019-03-25 1835 #define VIU_OSD_BLEND_DIN0_SCOPE_V 0x39b2 b93a66faeea9ddf Neil Armstrong 2019-03-25 1836 #define VIU_OSD_BLEND_DIN1_SCOPE_H 0x39b3 b93a66faeea9ddf Neil Armstrong 2019-03-25 1837 #define VIU_OSD_BLEND_DIN1_SCOPE_V 0x39b4 b93a66faeea9ddf Neil Armstrong 2019-03-25 1838 #define VIU_OSD_BLEND_DIN2_SCOPE_H 0x39b5 b93a66faeea9ddf Neil Armstrong 2019-03-25 1839 #define VIU_OSD_BLEND_DIN2_SCOPE_V 0x39b6 b93a66faeea9ddf Neil Armstrong 2019-03-25 1840 #define VIU_OSD_BLEND_DIN3_SCOPE_H 0x39b7 b93a66faeea9ddf Neil Armstrong 2019-03-25 1841 #define VIU_OSD_BLEND_DIN3_SCOPE_V 0x39b8 b93a66faeea9ddf Neil Armstrong 2019-03-25 1842 #define VIU_OSD_BLEND_DUMMY_DATA0 0x39b9 b93a66faeea9ddf Neil Armstrong 2019-03-25 1843 #define VIU_OSD_BLEND_DUMMY_ALPHA 0x39ba b93a66faeea9ddf Neil Armstrong 2019-03-25 1844 #define VIU_OSD_BLEND_BLEND0_SIZE 0x39bb b93a66faeea9ddf Neil Armstrong 2019-03-25 1845 #define VIU_OSD_BLEND_BLEND1_SIZE 0x39bc b93a66faeea9ddf Neil Armstrong 2019-03-25 1846 #define VIU_OSD_BLEND_RO_CURRENT_XY 0x39bf b93a66faeea9ddf Neil Armstrong 2019-03-25 1847 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============0914016653655956338==" MIME-Version: 1.0 From: kernel test robot To: kbuild-all@lists.01.org Subject: Re: [PATCHv5 1/4] arm64: io: Use asm-generic high level MMIO accessors Date: Mon, 06 Dec 2021 23:36:39 +0800 Message-ID: <202112062304.8qIQUQyF-lkp@intel.com> In-Reply-To: List-Id: --===============0914016653655956338== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Hi Sai, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on arm64/for-next/core] [also build test WARNING on rostedt-trace/for-next arnd-asm-generic/master = arm-perf/for-next/perf v5.16-rc4 next-20211206] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Sai-Prakash-Ranjan/tracing= -rwmmio-arm64-Add-support-to-trace-register-reads-writes/20211206-163212 base: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for= -next/core config: arm64-randconfig-r014-20211206 (https://download.01.org/0day-ci/arc= hive/20211206/202112062304.8qIQUQyF-lkp(a)intel.com/config) compiler: aarch64-linux-gcc (GCC) 11.2.0 reproduce (this is a W=3D1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/= make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/0775ecf0f452d6b76b161d009= dab52c90270755a git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Sai-Prakash-Ranjan/tracing-rwmmio-= arm64-Add-support-to-trace-register-reads-writes/20211206-163212 git checkout 0775ecf0f452d6b76b161d009dab52c90270755a # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=3D$HOME/0day COMPILER=3Dgcc-11.2.0 make.cross= O=3Dbuild_dir ARCH=3Darm64 SHELL=3D/bin/bash drivers/gpu/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): In file included from drivers/gpu/drm/meson/meson_viu.c:16: drivers/gpu/drm/meson/meson_viu.c: In function 'meson_viu_init': >> drivers/gpu/drm/meson/meson_registers.h:1826:55: warning: conversion fro= m 'long unsigned int' to 'u32' {aka 'unsigned int'} changes value from '184= 46744071814774785' to '2400190465' [-Woverflow] 1826 | #define VIU_OSD_BLEND_REORDER(dest, src) ((src) << = (dest * 4)) | ^ drivers/gpu/drm/meson/meson_viu.c:472:32: note: in expansion of macro 'V= IU_OSD_BLEND_REORDER' 472 | writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) | | ^~~~~~~~~~~~~~~~~~~~~ vim +1826 drivers/gpu/drm/meson/meson_registers.h b93a66faeea9ddf Neil Armstrong 2019-03-25 1824 = b93a66faeea9ddf Neil Armstrong 2019-03-25 1825 #define VIU_OSD_BLEND_CTRL= 0x39b0 147ae1cbaa18429 Julien Masson 2019-06-24 @1826 #define VIU_OSD_BLEND_REO= RDER(dest, src) ((src) << (dest * 4)) 147ae1cbaa18429 Julien Masson 2019-06-24 1827 #define VIU_OSD_BLEND_DIN= _EN(bits) ((bits & 0xf) << 20) 147ae1cbaa18429 Julien Masson 2019-06-24 1828 #define VIU_OSD_BLEND1_DI= N3_BYPASS_TO_DOUT1 BIT(24) 147ae1cbaa18429 Julien Masson 2019-06-24 1829 #define VIU_OSD_BLEND1_DO= UT_BYPASS_TO_BLEND2 BIT(25) 147ae1cbaa18429 Julien Masson 2019-06-24 1830 #define VIU_OSD_BLEND_DIN= 0_BYPASS_TO_DOUT0 BIT(26) 147ae1cbaa18429 Julien Masson 2019-06-24 1831 #define VIU_OSD_BLEND_BLE= N2_PREMULT_EN(input) ((input & 0x3) << 27) 147ae1cbaa18429 Julien Masson 2019-06-24 1832 #define VIU_OSD_BLEND_HOL= D_LINES(lines) ((lines & 0x7) << 29) b93a66faeea9ddf Neil Armstrong 2019-03-25 1833 #define VIU_OSD_BLEND_CTRL= 1 0x39c0 b93a66faeea9ddf Neil Armstrong 2019-03-25 1834 #define VIU_OSD_BLEND_DIN0= _SCOPE_H 0x39b1 b93a66faeea9ddf Neil Armstrong 2019-03-25 1835 #define VIU_OSD_BLEND_DIN0= _SCOPE_V 0x39b2 b93a66faeea9ddf Neil Armstrong 2019-03-25 1836 #define VIU_OSD_BLEND_DIN1= _SCOPE_H 0x39b3 b93a66faeea9ddf Neil Armstrong 2019-03-25 1837 #define VIU_OSD_BLEND_DIN1= _SCOPE_V 0x39b4 b93a66faeea9ddf Neil Armstrong 2019-03-25 1838 #define VIU_OSD_BLEND_DIN2= _SCOPE_H 0x39b5 b93a66faeea9ddf Neil Armstrong 2019-03-25 1839 #define VIU_OSD_BLEND_DIN2= _SCOPE_V 0x39b6 b93a66faeea9ddf Neil Armstrong 2019-03-25 1840 #define VIU_OSD_BLEND_DIN3= _SCOPE_H 0x39b7 b93a66faeea9ddf Neil Armstrong 2019-03-25 1841 #define VIU_OSD_BLEND_DIN3= _SCOPE_V 0x39b8 b93a66faeea9ddf Neil Armstrong 2019-03-25 1842 #define VIU_OSD_BLEND_DUMM= Y_DATA0 0x39b9 b93a66faeea9ddf Neil Armstrong 2019-03-25 1843 #define VIU_OSD_BLEND_DUMM= Y_ALPHA 0x39ba b93a66faeea9ddf Neil Armstrong 2019-03-25 1844 #define VIU_OSD_BLEND_BLEN= D0_SIZE 0x39bb b93a66faeea9ddf Neil Armstrong 2019-03-25 1845 #define VIU_OSD_BLEND_BLEN= D1_SIZE 0x39bc b93a66faeea9ddf Neil Armstrong 2019-03-25 1846 #define VIU_OSD_BLEND_RO_C= URRENT_XY 0x39bf b93a66faeea9ddf Neil Armstrong 2019-03-25 1847 = --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org --===============0914016653655956338==--