From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84D01C433EF for ; Tue, 7 Dec 2021 13:00:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236718AbhLGNE1 (ORCPT ); Tue, 7 Dec 2021 08:04:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236458AbhLGNE0 (ORCPT ); Tue, 7 Dec 2021 08:04:26 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E2A2C061574; Tue, 7 Dec 2021 05:00:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 04C55B817AB; Tue, 7 Dec 2021 13:00:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 70D83C341C6; Tue, 7 Dec 2021 13:00:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638882053; bh=tlZQmFrL4c1Q7qm8ZsencyO1fQ3VitQp6hwvBIsNvKE=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=aeBE5Zrf2kuyD0QZ9LLtvcfige7Oxx/yZ2y465k9Ky2u0IcJSAOhQV10BxgSlM1M+ HOJgTUHstK7sSdidZ+hck1HpWJri3SqsqR38MgcAYPLVD+n7DCm/l82Ue0Q0a1x63O Ul6l3ljb9o+NBb1GWggszojYit/K0dL6U8bMkR3jHuVEn56oV7BC15boebev5ZKVgo u2G5DfDwR7XX4W/HMtiD4J8p2/Zop30oxCI1aQXrkIhWKUVwiqdFfUJH/GeFBAhBw3 jebTErETudTe/Uv40BkFm17Y75FFVKBfgy8hcFYhwHnmmt8byLKACKKiSZMxvtB3fP naW/VAerP4l5w== Date: Tue, 7 Dec 2021 14:00:48 +0100 From: Mauro Carvalho Chehab To: Wei Xu Cc: Rob Herring , , , , , , Felipe Balbi Subject: Re: [PATCH 3/5] arm64: dts: HiSilicon: Add support for HiKey 970 USB3 PHY Message-ID: <20211207140048.3d54c55f@coco.lan> In-Reply-To: <61AF2069.5030607@hisilicon.com> References: <97d470290e81ac40023bdcc7e2d796796421b737.1637063775.git.mchehab+huawei@kernel.org> <61AF2069.5030607@hisilicon.com> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.30; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Em Tue, 7 Dec 2021 16:50:49 +0800 Wei Xu escreveu: > Hi Mauro, > > On 2021/11/16 19:59, Mauro Carvalho Chehab wrote: > > Add the USB3 bindings for Kirin 970 phy and HiKey 970 board. > > > > Signed-off-by: Mauro Carvalho Chehab > > --- > > > > To mailbombing on a large number of people, only mailing lists were C/C on the cover. > > See [PATCH 0/5] at: https://lore.kernel.org/all/cover.1637063775.git.mchehab+huawei@kernel.org/ > > > > .../boot/dts/hisilicon/hi3670-hikey970.dts | 83 +++++++++++++++++++ > > arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 56 +++++++++++++ > > 2 files changed, 139 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > index 7c32f5fd5cc5..60594db07041 100644 > > --- a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > @@ -430,3 +430,86 @@ &uart6 { > > label = "LS-UART1"; > > status = "okay"; > > }; > > + > > +&usb_phy { > > + phy-supply = <&ldo17>; > > +}; > > + > > +&i2c1 { > > + status = "okay"; > > + > > + rt1711h: rt1711h@4e { > > + compatible = "richtek,rt1711h"; > > + reg = <0x4e>; > > + status = "okay"; > > + interrupt-parent = <&gpio27>; > > + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&usb_cfg_func>; > > + > > + usb_con: connector { > > + compatible = "usb-c-connector"; > > + label = "USB-C"; > > + data-role = "dual"; > > + power-role = "dual"; > > + try-power-role = "sink"; > > + source-pdos = ; > > + sink-pdos = > + PDO_VAR(5000, 5000, 1000)>; > > + op-sink-microwatt = <10000000>; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + port@1 { > > + reg = <1>; > > + usb_con_ss: endpoint { > > + remote-endpoint = <&dwc3_ss>; > > + }; > > + }; > > + }; > > + }; > > + port { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + rt1711h_ep: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&hikey_usb_ep1>; > > + }; > > + }; > > + }; > > +}; > > + > > +&i2c2 { > > + /* USB HUB is on this bus at address 0x44 */ > > + status = "okay"; > > +}; > > + > > +&dwc3 { /* USB */ > > + dr_mode = "otg"; > > + maximum-speed = "super-speed"; > > + phy_type = "utmi"; > > + snps,dis-del-phy-power-chg-quirk; > > + snps,dis_u2_susphy_quirk; > > + snps,dis_u3_susphy_quirk; > > + snps,tx_de_emphasis_quirk; > > + snps,tx_de_emphasis = <1>; > > + snps,dis-split-quirk; > > + snps,gctl-reset-quirk; > > + usb-role-switch; > > + role-switch-default-mode = "host"; > > + port { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + dwc3_role_switch: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&hikey_usb_ep0>; > > + }; > > + > > + dwc3_ss: endpoint@1 { > > + reg = <1>; > > + remote-endpoint = <&usb_con_ss>; > > + }; > > + }; > > +}; > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > index 225dccbcb064..b47654b50139 100644 > > --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > @@ -8,6 +8,7 @@ > > > > #include > > #include > > +#include > > > > / { > > compatible = "hisilicon,hi3670"; > > @@ -892,5 +893,60 @@ i2c4: i2c@fdf0d000 { > > pinctrl-0 = <&i2c4_pmx_func &i2c4_cfg_func>; > > status = "disabled"; > > }; > > + > > + usb3_otg_bc: usb3_otg_bc@ff200000 { > > + compatible = "syscon", "simple-mfd"; > > + reg = <0x0 0xff200000 0x0 0x1000>; > > + > > + usb_phy: usbphy { > > + compatible = "hisilicon,hi3670-usb-phy"; > > + #phy-cells = <0>; > > + hisilicon,pericrg-syscon = <&crg_ctrl>; > > + hisilicon,pctrl-syscon = <&pctrl>; > > + hisilicon,sctrl-syscon = <&sctrl>; > > + hisilicon,eye-diagram-param = <0xFDFEE4>; > > + hisilicon,tx-vboost-lvl = <0x5>; > > + }; > > + }; > > + > > + usb31_misc_rst: usb31_misc_rst_controller { > > + compatible = "hisilicon,hi3660-reset"; > > + #reset-cells = <2>; > > + hisi,rst-syscon = <&usb3_otg_bc>; > > + }; > > + > > + usb3: hisi_dwc3 { > > + compatible = "hisilicon,hi3670-dwc3"; > > Could you please also add a binding document for the "hi3670-dwc3"? > The driver part has added the compatible string as you pointed out before. Just sent a patch adding a compatible for it: https://lore.kernel.org/all/fec9df1a99ad8639f23edc24cdcc3ec78ea31575.1638881845.git.mchehab+huawei@kernel.org/T/#u This is basically a DWC3 driver, using drivers/usb/dwc3/dwc3-of-simple.c to setup the needed clocks and reset pins to make DWC3 IP available. Thanks, Mauro From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C92A0C433FE for ; Tue, 7 Dec 2021 13:01:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236799AbhLGNFJ (ORCPT ); Tue, 7 Dec 2021 08:05:09 -0500 Received: from sin.source.kernel.org ([145.40.73.55]:48156 "EHLO sin.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236717AbhLGNFI (ORCPT ); Tue, 7 Dec 2021 08:05:08 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 12FE3CE19BC; Tue, 7 Dec 2021 13:01:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2BBCFC341C6; Tue, 7 Dec 2021 13:01:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638882095; bh=keBxHbjB8AP5/qJ3hn2VYj4CVUnlvblJ9kiHbZyhIyI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=H5jGQFIDljWiKDSiiEUkSEykimksJFlsuIHKR30/CUpBDa+Tuo8R9JTMY/NhASA+i ntTcB2eD4ZZraXe1zI9gbaF1rgG6p1Xqack/Zbf+ATVFt7L0J9CUTN+ypxglHKUq3/ V4ij+2wdC2JsvdfiLr87ISG2EdzZqz2z7hn8GjptnBXxaeb1mwB5sUvp1YrNYQeZEX 09nmzSa8JFIWMOnm+V7XSTGsritQ20aWVLJY1aTCS/ZvUpq+THe7CaSY7nGNOto6hT QchKQ2OeridOoGd/hU4VnmCI6+/r7CxchCENMcubEWUVluEpsKN5GqVAga1Pz3ufAf ngsFRtzGkBP0g== Date: Tue, 7 Dec 2021 14:01:30 +0100 From: Mauro Carvalho Chehab To: Wei Xu Cc: Rob Herring , , , , , , Felipe Balbi Subject: Re: [PATCH 3/5] arm64: dts: HiSilicon: Add support for HiKey 970 USB3 PHY Message-ID: <20211207140048.3d54c55f@coco.lan> In-Reply-To: <61AF2069.5030607@hisilicon.com> References: <97d470290e81ac40023bdcc7e2d796796421b737.1637063775.git.mchehab+huawei@kernel.org> <61AF2069.5030607@hisilicon.com> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.30; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Message-ID: <20211207130130.68NtZhBNYRa8W2-A2dd4Xq-vEAawvPxjpzYa6cUR4cE@z> Em Tue, 7 Dec 2021 16:50:49 +0800 Wei Xu escreveu: > Hi Mauro, > > On 2021/11/16 19:59, Mauro Carvalho Chehab wrote: > > Add the USB3 bindings for Kirin 970 phy and HiKey 970 board. > > > > Signed-off-by: Mauro Carvalho Chehab > > --- > > > > To mailbombing on a large number of people, only mailing lists were C/C on the cover. > > See [PATCH 0/5] at: https://lore.kernel.org/all/cover.1637063775.git.mchehab+huawei@kernel.org/ > > > > .../boot/dts/hisilicon/hi3670-hikey970.dts | 83 +++++++++++++++++++ > > arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 56 +++++++++++++ > > 2 files changed, 139 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > index 7c32f5fd5cc5..60594db07041 100644 > > --- a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > @@ -430,3 +430,86 @@ &uart6 { > > label = "LS-UART1"; > > status = "okay"; > > }; > > + > > +&usb_phy { > > + phy-supply = <&ldo17>; > > +}; > > + > > +&i2c1 { > > + status = "okay"; > > + > > + rt1711h: rt1711h@4e { > > + compatible = "richtek,rt1711h"; > > + reg = <0x4e>; > > + status = "okay"; > > + interrupt-parent = <&gpio27>; > > + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&usb_cfg_func>; > > + > > + usb_con: connector { > > + compatible = "usb-c-connector"; > > + label = "USB-C"; > > + data-role = "dual"; > > + power-role = "dual"; > > + try-power-role = "sink"; > > + source-pdos = ; > > + sink-pdos = > + PDO_VAR(5000, 5000, 1000)>; > > + op-sink-microwatt = <10000000>; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + port@1 { > > + reg = <1>; > > + usb_con_ss: endpoint { > > + remote-endpoint = <&dwc3_ss>; > > + }; > > + }; > > + }; > > + }; > > + port { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + rt1711h_ep: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&hikey_usb_ep1>; > > + }; > > + }; > > + }; > > +}; > > + > > +&i2c2 { > > + /* USB HUB is on this bus at address 0x44 */ > > + status = "okay"; > > +}; > > + > > +&dwc3 { /* USB */ > > + dr_mode = "otg"; > > + maximum-speed = "super-speed"; > > + phy_type = "utmi"; > > + snps,dis-del-phy-power-chg-quirk; > > + snps,dis_u2_susphy_quirk; > > + snps,dis_u3_susphy_quirk; > > + snps,tx_de_emphasis_quirk; > > + snps,tx_de_emphasis = <1>; > > + snps,dis-split-quirk; > > + snps,gctl-reset-quirk; > > + usb-role-switch; > > + role-switch-default-mode = "host"; > > + port { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + dwc3_role_switch: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&hikey_usb_ep0>; > > + }; > > + > > + dwc3_ss: endpoint@1 { > > + reg = <1>; > > + remote-endpoint = <&usb_con_ss>; > > + }; > > + }; > > +}; > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > index 225dccbcb064..b47654b50139 100644 > > --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > @@ -8,6 +8,7 @@ > > > > #include > > #include > > +#include > > > > / { > > compatible = "hisilicon,hi3670"; > > @@ -892,5 +893,60 @@ i2c4: i2c@fdf0d000 { > > pinctrl-0 = <&i2c4_pmx_func &i2c4_cfg_func>; > > status = "disabled"; > > }; > > + > > + usb3_otg_bc: usb3_otg_bc@ff200000 { > > + compatible = "syscon", "simple-mfd"; > > + reg = <0x0 0xff200000 0x0 0x1000>; > > + > > + usb_phy: usbphy { > > + compatible = "hisilicon,hi3670-usb-phy"; > > + #phy-cells = <0>; > > + hisilicon,pericrg-syscon = <&crg_ctrl>; > > + hisilicon,pctrl-syscon = <&pctrl>; > > + hisilicon,sctrl-syscon = <&sctrl>; > > + hisilicon,eye-diagram-param = <0xFDFEE4>; > > + hisilicon,tx-vboost-lvl = <0x5>; > > + }; > > + }; > > + > > + usb31_misc_rst: usb31_misc_rst_controller { > > + compatible = "hisilicon,hi3660-reset"; > > + #reset-cells = <2>; > > + hisi,rst-syscon = <&usb3_otg_bc>; > > + }; > > + > > + usb3: hisi_dwc3 { > > + compatible = "hisilicon,hi3670-dwc3"; > > Could you please also add a binding document for the "hi3670-dwc3"? > The driver part has added the compatible string as you pointed out before. Just sent a patch adding a compatible for it: https://lore.kernel.org/all/fec9df1a99ad8639f23edc24cdcc3ec78ea31575.1638881845.git.mchehab+huawei@kernel.org/T/#u This is basically a DWC3 driver, using drivers/usb/dwc3/dwc3-of-simple.c to setup the needed clocks and reset pins needed by the DWC3 driver. Thanks, Mauro From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCAD6C433F5 for ; Tue, 7 Dec 2021 13:03:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lUS8/kzUMXaJDMf+Xe4kC9F5+0sVklXyxTOc3kqcuwM=; b=O65zL8jvqFK78T wdWCRTNhTTjoCxmIcaZf2CLghkRi+Oa6qUvfbGSzgeoMVMpQzq6+EA1ppKx44wXvEkwmYt9a7Sy1x gIdK2CpuesYlC3E6UbhCtsGTKCZDB3JnRSVjcpm0U3wjjfyXmy/Inn4BbkYDO9kZAYFK1gkB00RfL K1KKFfzOV3EpZbJtqOZACgQhax2Bvb+bGdAWgRpxbazHiT3LO1vN8mvXaAE0EdPSaVjMersQkGc/n LGRXKF2DpTOGdk0RUDqsusJxBRvHodnZ0JuSkXdpPgYIxKZIsqOiwA3oUf8aOh+/f9OocIa0fiEkZ Duy2Kjz3Zqjdx3HyFWfQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mua5x-008b0R-1L; Tue, 07 Dec 2021 13:01:21 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mua5Y-008atq-D4 for linux-arm-kernel@lists.infradead.org; Tue, 07 Dec 2021 13:00:58 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 14ADAB817AC; Tue, 7 Dec 2021 13:00:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 70D83C341C6; Tue, 7 Dec 2021 13:00:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638882053; bh=tlZQmFrL4c1Q7qm8ZsencyO1fQ3VitQp6hwvBIsNvKE=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=aeBE5Zrf2kuyD0QZ9LLtvcfige7Oxx/yZ2y465k9Ky2u0IcJSAOhQV10BxgSlM1M+ HOJgTUHstK7sSdidZ+hck1HpWJri3SqsqR38MgcAYPLVD+n7DCm/l82Ue0Q0a1x63O Ul6l3ljb9o+NBb1GWggszojYit/K0dL6U8bMkR3jHuVEn56oV7BC15boebev5ZKVgo u2G5DfDwR7XX4W/HMtiD4J8p2/Zop30oxCI1aQXrkIhWKUVwiqdFfUJH/GeFBAhBw3 jebTErETudTe/Uv40BkFm17Y75FFVKBfgy8hcFYhwHnmmt8byLKACKKiSZMxvtB3fP naW/VAerP4l5w== Date: Tue, 7 Dec 2021 14:00:48 +0100 From: Mauro Carvalho Chehab To: Wei Xu Cc: Rob Herring , , , , , , Felipe Balbi Subject: Re: [PATCH 3/5] arm64: dts: HiSilicon: Add support for HiKey 970 USB3 PHY Message-ID: <20211207140048.3d54c55f@coco.lan> In-Reply-To: <61AF2069.5030607@hisilicon.com> References: <97d470290e81ac40023bdcc7e2d796796421b737.1637063775.git.mchehab+huawei@kernel.org> <61AF2069.5030607@hisilicon.com> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.30; x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211207_050056_784771_3D3908EE X-CRM114-Status: GOOD ( 22.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Em Tue, 7 Dec 2021 16:50:49 +0800 Wei Xu escreveu: > Hi Mauro, > > On 2021/11/16 19:59, Mauro Carvalho Chehab wrote: > > Add the USB3 bindings for Kirin 970 phy and HiKey 970 board. > > > > Signed-off-by: Mauro Carvalho Chehab > > --- > > > > To mailbombing on a large number of people, only mailing lists were C/C on the cover. > > See [PATCH 0/5] at: https://lore.kernel.org/all/cover.1637063775.git.mchehab+huawei@kernel.org/ > > > > .../boot/dts/hisilicon/hi3670-hikey970.dts | 83 +++++++++++++++++++ > > arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 56 +++++++++++++ > > 2 files changed, 139 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > index 7c32f5fd5cc5..60594db07041 100644 > > --- a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > @@ -430,3 +430,86 @@ &uart6 { > > label = "LS-UART1"; > > status = "okay"; > > }; > > + > > +&usb_phy { > > + phy-supply = <&ldo17>; > > +}; > > + > > +&i2c1 { > > + status = "okay"; > > + > > + rt1711h: rt1711h@4e { > > + compatible = "richtek,rt1711h"; > > + reg = <0x4e>; > > + status = "okay"; > > + interrupt-parent = <&gpio27>; > > + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&usb_cfg_func>; > > + > > + usb_con: connector { > > + compatible = "usb-c-connector"; > > + label = "USB-C"; > > + data-role = "dual"; > > + power-role = "dual"; > > + try-power-role = "sink"; > > + source-pdos = ; > > + sink-pdos = > + PDO_VAR(5000, 5000, 1000)>; > > + op-sink-microwatt = <10000000>; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + port@1 { > > + reg = <1>; > > + usb_con_ss: endpoint { > > + remote-endpoint = <&dwc3_ss>; > > + }; > > + }; > > + }; > > + }; > > + port { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + rt1711h_ep: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&hikey_usb_ep1>; > > + }; > > + }; > > + }; > > +}; > > + > > +&i2c2 { > > + /* USB HUB is on this bus at address 0x44 */ > > + status = "okay"; > > +}; > > + > > +&dwc3 { /* USB */ > > + dr_mode = "otg"; > > + maximum-speed = "super-speed"; > > + phy_type = "utmi"; > > + snps,dis-del-phy-power-chg-quirk; > > + snps,dis_u2_susphy_quirk; > > + snps,dis_u3_susphy_quirk; > > + snps,tx_de_emphasis_quirk; > > + snps,tx_de_emphasis = <1>; > > + snps,dis-split-quirk; > > + snps,gctl-reset-quirk; > > + usb-role-switch; > > + role-switch-default-mode = "host"; > > + port { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + dwc3_role_switch: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&hikey_usb_ep0>; > > + }; > > + > > + dwc3_ss: endpoint@1 { > > + reg = <1>; > > + remote-endpoint = <&usb_con_ss>; > > + }; > > + }; > > +}; > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > index 225dccbcb064..b47654b50139 100644 > > --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > @@ -8,6 +8,7 @@ > > > > #include > > #include > > +#include > > > > / { > > compatible = "hisilicon,hi3670"; > > @@ -892,5 +893,60 @@ i2c4: i2c@fdf0d000 { > > pinctrl-0 = <&i2c4_pmx_func &i2c4_cfg_func>; > > status = "disabled"; > > }; > > + > > + usb3_otg_bc: usb3_otg_bc@ff200000 { > > + compatible = "syscon", "simple-mfd"; > > + reg = <0x0 0xff200000 0x0 0x1000>; > > + > > + usb_phy: usbphy { > > + compatible = "hisilicon,hi3670-usb-phy"; > > + #phy-cells = <0>; > > + hisilicon,pericrg-syscon = <&crg_ctrl>; > > + hisilicon,pctrl-syscon = <&pctrl>; > > + hisilicon,sctrl-syscon = <&sctrl>; > > + hisilicon,eye-diagram-param = <0xFDFEE4>; > > + hisilicon,tx-vboost-lvl = <0x5>; > > + }; > > + }; > > + > > + usb31_misc_rst: usb31_misc_rst_controller { > > + compatible = "hisilicon,hi3660-reset"; > > + #reset-cells = <2>; > > + hisi,rst-syscon = <&usb3_otg_bc>; > > + }; > > + > > + usb3: hisi_dwc3 { > > + compatible = "hisilicon,hi3670-dwc3"; > > Could you please also add a binding document for the "hi3670-dwc3"? > The driver part has added the compatible string as you pointed out before. Just sent a patch adding a compatible for it: https://lore.kernel.org/all/fec9df1a99ad8639f23edc24cdcc3ec78ea31575.1638881845.git.mchehab+huawei@kernel.org/T/#u This is basically a DWC3 driver, using drivers/usb/dwc3/dwc3-of-simple.c to setup the needed clocks and reset pins to make DWC3 IP available. Thanks, Mauro _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72EDCC433F5 for ; Tue, 7 Dec 2021 13:04:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YIaBf48k0ogqIxPZWKtUqDi47KVpzOWCU8+df8G/aTM=; b=Gwx1C46m5WgRmU wvNUBGwp1F6DtNrrfmpoTC2q24ABJ/sbcWuAxQQV60Pbj69ov+4m2udA10NUIGQwTZJkxTIbMw1iP xu8jbysyDw6Aq6t2k4IaoRM8k/ixw2OlJOXBEnIvIzc0dlTWwVHexD878GXfqWlr6FEW144Pt+NMt nwKaFMde88TWjp6fP1MJVprlMorD7mixVuYVtztAF5MBwHIM7Pv/Pifh78qNH/T1ZMyavQOy1Zcz8 +4UMr1XXqfduhNa+qwISfObIZ4jaIcN1STaH7TkhgZ8bysBIVrAyULPyxZjRfVv/L8/qg5SN75iTv bA7RA3+QIzI66bq2tlTg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mua6s-008bKg-Dp; Tue, 07 Dec 2021 13:02:19 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mua6E-008b8r-Ox for linux-arm-kernel@lists.infradead.org; Tue, 07 Dec 2021 13:01:40 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 16964CE1AAB; Tue, 7 Dec 2021 13:01:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2BBCFC341C6; Tue, 7 Dec 2021 13:01:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638882095; bh=keBxHbjB8AP5/qJ3hn2VYj4CVUnlvblJ9kiHbZyhIyI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=H5jGQFIDljWiKDSiiEUkSEykimksJFlsuIHKR30/CUpBDa+Tuo8R9JTMY/NhASA+i ntTcB2eD4ZZraXe1zI9gbaF1rgG6p1Xqack/Zbf+ATVFt7L0J9CUTN+ypxglHKUq3/ V4ij+2wdC2JsvdfiLr87ISG2EdzZqz2z7hn8GjptnBXxaeb1mwB5sUvp1YrNYQeZEX 09nmzSa8JFIWMOnm+V7XSTGsritQ20aWVLJY1aTCS/ZvUpq+THe7CaSY7nGNOto6hT QchKQ2OeridOoGd/hU4VnmCI6+/r7CxchCENMcubEWUVluEpsKN5GqVAga1Pz3ufAf ngsFRtzGkBP0g== Date: Tue, 7 Dec 2021 14:01:30 +0100 From: Mauro Carvalho Chehab To: Wei Xu Cc: Rob Herring , , , , , , Felipe Balbi Subject: Re: [PATCH 3/5] arm64: dts: HiSilicon: Add support for HiKey 970 USB3 PHY Message-ID: <20211207140048.3d54c55f@coco.lan> In-Reply-To: <61AF2069.5030607@hisilicon.com> References: <97d470290e81ac40023bdcc7e2d796796421b737.1637063775.git.mchehab+huawei@kernel.org> <61AF2069.5030607@hisilicon.com> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.30; x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211207_050139_226147_48C6A2E0 X-CRM114-Status: GOOD ( 22.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Message-ID: <20211207130130.sVShjhE0m_7y5AUne9wswdXP4wNLZkt7oN7PJAMydsc@z> Em Tue, 7 Dec 2021 16:50:49 +0800 Wei Xu escreveu: > Hi Mauro, > > On 2021/11/16 19:59, Mauro Carvalho Chehab wrote: > > Add the USB3 bindings for Kirin 970 phy and HiKey 970 board. > > > > Signed-off-by: Mauro Carvalho Chehab > > --- > > > > To mailbombing on a large number of people, only mailing lists were C/C on the cover. > > See [PATCH 0/5] at: https://lore.kernel.org/all/cover.1637063775.git.mchehab+huawei@kernel.org/ > > > > .../boot/dts/hisilicon/hi3670-hikey970.dts | 83 +++++++++++++++++++ > > arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 56 +++++++++++++ > > 2 files changed, 139 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > index 7c32f5fd5cc5..60594db07041 100644 > > --- a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts > > @@ -430,3 +430,86 @@ &uart6 { > > label = "LS-UART1"; > > status = "okay"; > > }; > > + > > +&usb_phy { > > + phy-supply = <&ldo17>; > > +}; > > + > > +&i2c1 { > > + status = "okay"; > > + > > + rt1711h: rt1711h@4e { > > + compatible = "richtek,rt1711h"; > > + reg = <0x4e>; > > + status = "okay"; > > + interrupt-parent = <&gpio27>; > > + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&usb_cfg_func>; > > + > > + usb_con: connector { > > + compatible = "usb-c-connector"; > > + label = "USB-C"; > > + data-role = "dual"; > > + power-role = "dual"; > > + try-power-role = "sink"; > > + source-pdos = ; > > + sink-pdos = > + PDO_VAR(5000, 5000, 1000)>; > > + op-sink-microwatt = <10000000>; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + port@1 { > > + reg = <1>; > > + usb_con_ss: endpoint { > > + remote-endpoint = <&dwc3_ss>; > > + }; > > + }; > > + }; > > + }; > > + port { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + rt1711h_ep: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&hikey_usb_ep1>; > > + }; > > + }; > > + }; > > +}; > > + > > +&i2c2 { > > + /* USB HUB is on this bus at address 0x44 */ > > + status = "okay"; > > +}; > > + > > +&dwc3 { /* USB */ > > + dr_mode = "otg"; > > + maximum-speed = "super-speed"; > > + phy_type = "utmi"; > > + snps,dis-del-phy-power-chg-quirk; > > + snps,dis_u2_susphy_quirk; > > + snps,dis_u3_susphy_quirk; > > + snps,tx_de_emphasis_quirk; > > + snps,tx_de_emphasis = <1>; > > + snps,dis-split-quirk; > > + snps,gctl-reset-quirk; > > + usb-role-switch; > > + role-switch-default-mode = "host"; > > + port { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + dwc3_role_switch: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&hikey_usb_ep0>; > > + }; > > + > > + dwc3_ss: endpoint@1 { > > + reg = <1>; > > + remote-endpoint = <&usb_con_ss>; > > + }; > > + }; > > +}; > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > index 225dccbcb064..b47654b50139 100644 > > --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > > @@ -8,6 +8,7 @@ > > > > #include > > #include > > +#include > > > > / { > > compatible = "hisilicon,hi3670"; > > @@ -892,5 +893,60 @@ i2c4: i2c@fdf0d000 { > > pinctrl-0 = <&i2c4_pmx_func &i2c4_cfg_func>; > > status = "disabled"; > > }; > > + > > + usb3_otg_bc: usb3_otg_bc@ff200000 { > > + compatible = "syscon", "simple-mfd"; > > + reg = <0x0 0xff200000 0x0 0x1000>; > > + > > + usb_phy: usbphy { > > + compatible = "hisilicon,hi3670-usb-phy"; > > + #phy-cells = <0>; > > + hisilicon,pericrg-syscon = <&crg_ctrl>; > > + hisilicon,pctrl-syscon = <&pctrl>; > > + hisilicon,sctrl-syscon = <&sctrl>; > > + hisilicon,eye-diagram-param = <0xFDFEE4>; > > + hisilicon,tx-vboost-lvl = <0x5>; > > + }; > > + }; > > + > > + usb31_misc_rst: usb31_misc_rst_controller { > > + compatible = "hisilicon,hi3660-reset"; > > + #reset-cells = <2>; > > + hisi,rst-syscon = <&usb3_otg_bc>; > > + }; > > + > > + usb3: hisi_dwc3 { > > + compatible = "hisilicon,hi3670-dwc3"; > > Could you please also add a binding document for the "hi3670-dwc3"? > The driver part has added the compatible string as you pointed out before. Just sent a patch adding a compatible for it: https://lore.kernel.org/all/fec9df1a99ad8639f23edc24cdcc3ec78ea31575.1638881845.git.mchehab+huawei@kernel.org/T/#u This is basically a DWC3 driver, using drivers/usb/dwc3/dwc3-of-simple.c to setup the needed clocks and reset pins needed by the DWC3 driver. Thanks, Mauro _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel