From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A3CEC433FE for ; Mon, 13 Dec 2021 22:16:15 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0E06B83775; Mon, 13 Dec 2021 23:16:13 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="U/1ucQDP"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A116A8309E; Mon, 13 Dec 2021 23:15:59 +0100 (CET) Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D0AF1830FB for ; Mon, 13 Dec 2021 23:15:51 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=alpernebiyasak@gmail.com Received: by mail-ed1-x536.google.com with SMTP id x15so57823236edv.1 for ; Mon, 13 Dec 2021 14:15:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sietRZbc7DqRlXgRIlvooPmrC6Pd/sU/9bnfk0LqAcI=; b=U/1ucQDPsoEIuRkXcUsg9RHFgAy2TFFuZHXL3/U3lsEzHJXqSdxYXP9J4ae22LLNQ7 JEOxzXXfDrylDUFCTJGpQ09uc7Vc+N6BbD/cpOJJZELNeuToRoRbWSoKUlZJdEmqWxK6 FDCEy9BDMtn1+Vx+v0kaDx0FDPnZEGxKi7EGguNfwpsB+eLw9Zj8xZI5wfiCH36DJc6t 2EuwSqlZ1UDIOtvd/48DM5TqUNjCeAQPjT9GjnbvRHznuaY5SRwfL4BeNz9mt06xZWjp 8Ze8JlAZb8nSKPuQdf+X/PnNod9di0fOcPAwlEXdkfoxzu0DETcb6ULWCDtVt3W32X9O npFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sietRZbc7DqRlXgRIlvooPmrC6Pd/sU/9bnfk0LqAcI=; b=7mZNlauaGS7FrB+lIqECNYmDSJMF3eRjdBu3RrgQpS6yzMBeZtwmXDSyaLzPn8TGuh WaFOvOPzPctc4LF7K5Ob8kv4ctanu5yVie0aW5kFp01jhETbsUEg1S8mvqo/LdfjKmi0 HfpsgYNRIYWbUNfFKxWzUqAVoExI8XWAK9xP9seT7euDimibTzd6eNzW/9OiYMY65bpV 2WglY6x3XEUsKJKi06YyTsgqaFSIeKDFEe9B6cJstmi1oZ9CxB8Nw1CFEuGVRbkiT+xx zs68j+NipEh0IIMYAepI+lcyvnUNbpBqyqSx1FyLf+ABRhbEp3l5DIw0jF0Ed1WpZoz4 z2CA== X-Gm-Message-State: AOAM532po4fvontpj8HA6ArEJI11eNhbBxuBZenHuqZZrny1YKH5UpZz 7rpvTfMTSE5t1jRPHJXUgDU5NyNtFP4RSg== X-Google-Smtp-Source: ABdhPJxIRqXXTjEDXwpv4oGK4YaHF2fiEo5gJJAOCdVmrjZ8B9u/Ko4jmlH2SYiHeRKOgGkdTSKeHA== X-Received: by 2002:aa7:d051:: with SMTP id n17mr2192200edo.79.1639433751430; Mon, 13 Dec 2021 14:15:51 -0800 (PST) Received: from localhost.localdomain ([178.233.26.119]) by smtp.gmail.com with ESMTPSA id t20sm6880774edv.81.2021.12.13.14.15.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Dec 2021 14:15:50 -0800 (PST) From: Alper Nebi Yasak To: u-boot@lists.denx.de Cc: Artem Lapkin , Christian Hewitt , Fabio Estevam , Jagan Teki , Lokesh Vutla , "Marty E . Plummer" , Heiko Schocher , Simon Glass , Andre Przywara , Neil Armstrong , Tim Harvey , Johan Jonker , Kever Yang , Alexandre Vicenzi , Peter Robinson , Philipp Tomsich , Alper Nebi Yasak Subject: [PATCH v2 2/4] rockchip: gru: Add more devicetree settings Date: Tue, 14 Dec 2021 01:15:25 +0300 Message-Id: <20211213221528.43102-3-alpernebiyasak@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211213221528.43102-1-alpernebiyasak@gmail.com> References: <20211213221528.43102-1-alpernebiyasak@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Simon Glass This adds some devicetree settings for the Gru-based boards, based on what works on a Kevin board. Gru-based boards usually have an 8MiB SPI flash chip and boot from it. Make the u-boot.rom file intended to be flashed on it match its size. Add properties for booting from SPI, and only try to boot from SPI as MMC and SD card don't seem to work in SPL yet. The Chromium OS EC needs a delay between transactions so it can get itself ready. Also it currently uses a non-standard way of specifying the interrupt. Add these so that the EC works reliably. The Rockchip Embedded DisplayPort driver is looking for a rockchip,panel property to find the panel it should work on. Add the property for the Gru-based boards. The U-Boot GPIO controlled regulator driver only considers the "enable-gpios" devicetree property, not the singular "enable-gpio" one. Some devicetree source files have the singular form as they were added to Linux kernel when it used that form, and imported to U-Boot as is. Fix one instance of this in the Gru boards' devicetree to the form that works in U-Boot. The PWM controlled regulator driver complains that there is no init voltage set for a regulator it drives, though it's not clear which one. Set them all to the voltage levels coreboot sets them: 900 mV. The RK3399 SoC needs to know the voltage level that some supplies provides, including one fixed 1.8V audio-related regulator. Although this synchronization is currently statically done in the board init functions, a not-so-hypothetical driver that does this dynamically would query the regulator only to get -ENODATA and be confused. Make sure U-Boot knows this supply is at 1.8V by setting its limits to that. Most of this is a reapplication of commit 08c85b57a5ec ("rockchip: gru: Add extra device-tree settings") whose changes were removed during a sync with Linux at commit 167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux"). Apply things to rk3399-gru-u-boot.dtsi instead so they don't get lost again. Signed-off-by: Simon Glass [Alper: move to -u-boot.dtsi, rewrite commit message, add more nodes] Co-developed-by: Alper Nebi Yasak Signed-off-by: Alper Nebi Yasak --- Kept sign-off and author as Simon based on the aforementioned commit. (no changes since v1) arch/arm/dts/rk3399-gru-u-boot.dtsi | 55 +++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi index 390ac2bb5a9a..33734e99be50 100644 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi @@ -5,6 +5,61 @@ #include "rk3399-u-boot.dtsi" +/ { + chosen { + u-boot,spl-boot-order = &spi_flash; + }; + + config { + u-boot,spl-payload-offset = <0x40000>; + }; +}; + +&binman { + rom { + size = <0x800000>; + }; +}; + +&cros_ec { + ec-interrupt = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>; +}; + +&edp { + rockchip,panel = <&edp_panel>; +}; + +&pp1800_audio { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +}; + +&ppvar_bigcpu_pwm { + regulator-init-microvolt = <900000>; +}; + +&ppvar_centerlogic_pwm { + regulator-init-microvolt = <900000>; +}; + +&ppvar_gpu_pwm { + regulator-init-microvolt = <900000>; +}; + +&ppvar_litcpu_pwm { + regulator-init-microvolt = <900000>; +}; + +&ppvar_sd_card_io { + enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; +}; + +&spi5 { + spi-activate-delay = <100>; + spi-max-frequency = <3000000>; + spi-deactivate-delay = <200>; +}; + &spi_flash { u-boot,dm-pre-reloc; }; -- 2.34.1