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From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [PATCH 4/9] arm: s5pc1xx: Move CONFIG_SYS_CLK_FREQ_C1x0 out of CONFIG namespace
Date: Tue, 14 Dec 2021 13:36:36 -0500	[thread overview]
Message-ID: <20211214183641.1877371-4-trini@konsulko.com> (raw)
In-Reply-To: <20211214183641.1877371-1-trini@konsulko.com>

The values CONFIG_SYS_CLK_FREQ_C100 and CONFIG_SYS_CLK_FREQ_C110 are
only used in one place and not changed by the board config file.  Move
these out of the CONFIG namespace and in to the CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
---
 arch/arm/mach-s5pc1xx/clock.c | 12 ++++--------
 include/configs/s5p_goni.h    |  3 ---
 2 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-s5pc1xx/clock.c b/arch/arm/mach-s5pc1xx/clock.c
index 555228a52083..c90c341b5082 100644
--- a/arch/arm/mach-s5pc1xx/clock.c
+++ b/arch/arm/mach-s5pc1xx/clock.c
@@ -14,12 +14,8 @@
 #define CLK_D	1
 #define CLK_P	2
 
-#ifndef CONFIG_SYS_CLK_FREQ_C100
-#define CONFIG_SYS_CLK_FREQ_C100	12000000
-#endif
-#ifndef CONFIG_SYS_CLK_FREQ_C110
-#define CONFIG_SYS_CLK_FREQ_C110	24000000
-#endif
+#define CFG_SYS_CLK_FREQ_C100	12000000
+#define CFG_SYS_CLK_FREQ_C110	24000000
 
 /* s5pc110: return pll clock frequency */
 static unsigned long s5pc100_get_pll_clk(int pllreg)
@@ -66,7 +62,7 @@ static unsigned long s5pc100_get_pll_clk(int pllreg)
 	s = r & 0x7;
 
 	/* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
-	freq = CONFIG_SYS_CLK_FREQ_C100;
+	freq = CFG_SYS_CLK_FREQ_C100;
 	fout = m * (freq / (p * (1 << s)));
 
 	return fout;
@@ -116,7 +112,7 @@ static unsigned long s5pc110_get_pll_clk(int pllreg)
 	/* SDIV [2:0] */
 	s = r & 0x7;
 
-	freq = CONFIG_SYS_CLK_FREQ_C110;
+	freq = CFG_SYS_CLK_FREQ_C110;
 	if (pllreg == APLL) {
 		if (s < 1)
 			s = 1;
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 14840a453a67..e3b091a93709 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -18,9 +18,6 @@
 #include <linux/sizes.h>
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 
-/* input clock of PLL: has 24MHz input clock at S5PC110 */
-#define CONFIG_SYS_CLK_FREQ_C110	24000000
-
 /* DRAM Base */
 #define CONFIG_SYS_SDRAM_BASE		0x30000000
 
-- 
2.25.1


  parent reply	other threads:[~2021-12-14 18:37 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-14 18:36 [PATCH 1/9] Convert CONFIG_TPL_TEXT_BASE to Kconfig Tom Rini
2021-12-14 18:36 ` [PATCH 2/9] Convert CONFIG_SYS_NAND_U_BOOT_OFFS " Tom Rini
2021-12-28 12:57   ` Tom Rini
2021-12-14 18:36 ` [PATCH 3/9] Convert CONFIG_ARCH_MAP_SYSMEM " Tom Rini
2021-12-28 12:57   ` Tom Rini
2021-12-28 12:57   ` Tom Rini
2021-12-14 18:36 ` Tom Rini [this message]
2021-12-28 12:57   ` [PATCH 4/9] arm: s5pc1xx: Move CONFIG_SYS_CLK_FREQ_C1x0 out of CONFIG namespace Tom Rini
2021-12-14 18:36 ` [PATCH 5/9] ls1088a: Guard get_board_ddr_clk function correctly Tom Rini
2021-12-28 12:57   ` Tom Rini
2021-12-14 18:36 ` [PATCH 6/9] nxp: ics307_clk: " Tom Rini
2021-12-28 12:57   ` Tom Rini
2021-12-14 18:36 ` [PATCH 7/9] CONFIG_SYS_CLK_FREQ: Consistently be static or get_board_sys_clk() Tom Rini
2021-12-28 12:57   ` Tom Rini
2021-12-14 18:36 ` [PATCH 8/9] Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig Tom Rini
2021-12-28 12:58   ` Tom Rini
2021-12-14 18:36 ` [PATCH 9/9] CI: Test for unmigrated CONFIG symbols in board config.h files Tom Rini
2021-12-28 12:58   ` Tom Rini
2021-12-28 12:57 ` [PATCH 1/9] Convert CONFIG_TPL_TEXT_BASE to Kconfig Tom Rini

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