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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Fam Zheng" <fam@euphon.net>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Dmitry Fleytman" <dmitry.fleytman@gmail.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Jason Wang" <jasowang@redhat.com>,
	"Bin Meng" <bin.meng@windriver.com>,
	"David Hildenbrand" <david@redhat.com>,
	"Peter Xu" <peterx@redhat.com>,
	"Gerd Hoffmann" <kraxel@redhat.com>,
	"Klaus Jensen" <its@irrelevant.dk>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Sven Schnelle" <svens@stackframe.org>,
	"Hannes Reinecke" <hare@suse.com>,
	qemu-block@nongnu.org,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Havard Skinnemoen" <hskinnemoen@google.com>,
	"Joel Stanley" <joel@jms.id.au>, "Stefan Weil" <sw@weilnetz.de>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Greg Kurz" <groug@kaod.org>,
	"Beniamino Galvani" <b.galvani@gmail.com>,
	"Eric Auger" <eric.auger@redhat.com>,
	qemu-arm@nongnu.org, "Jan Kiszka" <jan.kiszka@web.de>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Keith Busch" <kbusch@kernel.org>, "John Snow" <jsnow@redhat.com>,
	"David Gibson" <david@gibson.dropbear.id.au>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Andrew Jeffery" <andrew@aj.id.au>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Andrew Baumann" <Andrew.Baumann@microsoft.com>,
	"Tyrone Ting" <kfting@nuvoton.com>,
	qemu-ppc@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>
Subject: [PATCH v2 19/23] hw/scsi/megasas: Use uint32_t for reply queue head/tail values
Date: Thu, 23 Dec 2021 12:55:50 +0100	[thread overview]
Message-ID: <20211223115554.3155328-20-philmd@redhat.com> (raw)
In-Reply-To: <20211223115554.3155328-1-philmd@redhat.com>

While the reply queue values fit in 16-bit, they are accessed
as 32-bit:

  661:    s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa);
  662:    s->reply_queue_head %= MEGASAS_MAX_FRAMES;
  663:    s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa);
  664:    s->reply_queue_tail %= MEGASAS_MAX_FRAMES;

Having:

  41:#define MEGASAS_MAX_FRAMES 2048         /* Firmware limit at 65535 */

In order to update the ld/st*_pci_dma() API to pass the address
of the value to access, it is simpler to have the head/tail declared
as 32-bit values. Replace the uint16_t by uint32_t, wasting 4 bytes in
the MegasasState structure.

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/scsi/megasas.c    | 4 ++--
 hw/scsi/trace-events | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index 87101705d01..266c3d38003 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -109,8 +109,8 @@ struct MegasasState {
     uint64_t reply_queue_pa;
     void *reply_queue;
     uint16_t reply_queue_len;
-    uint16_t reply_queue_head;
-    uint16_t reply_queue_tail;
+    uint32_t reply_queue_head;
+    uint32_t reply_queue_tail;
     uint64_t consumer_pa;
     uint64_t producer_pa;
 
diff --git a/hw/scsi/trace-events b/hw/scsi/trace-events
index 92d5b40f892..ae8551f2797 100644
--- a/hw/scsi/trace-events
+++ b/hw/scsi/trace-events
@@ -42,18 +42,18 @@ mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_
 
 # megasas.c
 megasas_init_firmware(uint64_t pa) "pa 0x%" PRIx64 " "
-megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at 0x%" PRIx64 " len %d head 0x%" PRIx64 " tail 0x%" PRIx64 " flags 0x%x"
+megasas_init_queue(uint64_t queue_pa, int queue_len, uint32_t head, uint32_t tail, uint32_t flags) "queue at 0x%" PRIx64 " len %d head 0x%" PRIx32 " tail 0x%" PRIx32 " flags 0x%x"
 megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
 megasas_initq_mapped(uint64_t pa) "queue already mapped at 0x%" PRIx64
 megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d"
 megasas_qf_mapped(unsigned int index) "skip mapped frame 0x%x"
 megasas_qf_new(unsigned int index, uint64_t frame) "frame 0x%x addr 0x%" PRIx64
 megasas_qf_busy(unsigned long pa) "all frames busy for frame 0x%lx"
-megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int head, unsigned int tail, int busy) "frame 0x%x count %d context 0x%" PRIx64 " head 0x%x tail 0x%x busy %d"
-megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) "head 0x%x tail 0x%x busy %d"
+megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, uint32_t head, uint32_t tail, unsigned int busy) "frame 0x%x count %d context 0x%" PRIx64 " head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u"
+megasas_qf_update(uint32_t head, uint32_t tail, unsigned int busy) "head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u"
 megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
 megasas_qf_complete_noirq(uint64_t context) "context 0x%" PRIx64 " "
-megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) "context 0x%" PRIx64 " head 0x%x tail 0x%x busy %d"
+megasas_qf_complete(uint64_t context, uint32_t head, uint32_t tail, int busy) "context 0x%" PRIx64 " head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u"
 megasas_frame_busy(uint64_t addr) "frame 0x%" PRIx64 " busy"
 megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd 0x%x"
 megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
-- 
2.33.1



  parent reply	other threads:[~2021-12-23 12:53 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-23 11:55 [PATCH v2 00/23] hw: Have DMA APIs take MemTxAttrs arg & propagate MemTxResult (full) Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 01/23] dma: Let dma_memory_valid() take MemTxAttrs argument Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 02/23] dma: Let dma_memory_set() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 03/23] dma: Let dma_memory_rw_relaxed() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 04/23] dma: Let dma_memory_rw() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 05/23] dma: Let dma_memory_read/write() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 06/23] dma: Let dma_memory_map() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 07/23] dma: Have dma_buf_rw() take a void pointer Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 08/23] dma: Have dma_buf_read() / dma_buf_write() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 09/23] dma: Let pci_dma_rw() take MemTxAttrs argument Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 10/23] dma: Let dma_buf_rw() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 11/23] dma: Let dma_buf_write() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 12/23] dma: Let dma_buf_read() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 13/23] dma: Let dma_buf_rw() propagate MemTxResult Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 14/23] dma: Let dma_buf_read() / dma_buf_write() " Philippe Mathieu-Daudé
2021-12-30 23:59   ` Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 15/23] dma: Let st*_dma() take MemTxAttrs argument Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 16/23] dma: Let ld*_dma() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 17/23] dma: Let st*_dma() propagate MemTxResult Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 18/23] dma: Let ld*_dma() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` Philippe Mathieu-Daudé [this message]
2021-12-23 11:55 ` [PATCH v2 20/23] pci: Let st*_pci_dma() take MemTxAttrs argument Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 21/23] pci: Let ld*_pci_dma() " Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 22/23] pci: Let st*_pci_dma() propagate MemTxResult Philippe Mathieu-Daudé
2021-12-23 11:55 ` [PATCH v2 23/23] pci: Let ld*_pci_dma() " Philippe Mathieu-Daudé
2021-12-30 16:07 ` [PATCH v2 00/23] hw: Have DMA APIs take MemTxAttrs arg & propagate MemTxResult (full) Philippe Mathieu-Daudé
2021-12-31  0:01   ` Philippe Mathieu-Daudé

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