From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0ADBC433F5 for ; Fri, 24 Dec 2021 07:26:47 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D828483709; Fri, 24 Dec 2021 08:26:22 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="hePpV/mT"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4490B83782; Fri, 24 Dec 2021 08:26:11 +0100 (CET) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C095F83788 for ; Fri, 24 Dec 2021 08:26:01 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=vigneshr@ti.com Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 1BO7Q0Fu076129; Fri, 24 Dec 2021 01:26:00 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1640330760; bh=AF4ex78RuCql1NMfvetOFhU3C9EFMmq7c/07+AX/340=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hePpV/mTOQ5QF3wgSbBb8+INvPUa6sID+XS5/IQmYIg+87C0EV/GecsfUySbf9872 Za6hCSCtMxhO0jPdggGfXg8gr0WOXsIOEBvZp7pR3kSyixROqJ2dORX6duy1PIE8zz KRvF3QnXA/2eIvBXGbJ4g1lVDcDnxxWMzDD3DbiA= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 1BO7PxGl065186 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 24 Dec 2021 01:25:59 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Fri, 24 Dec 2021 01:25:59 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Fri, 24 Dec 2021 01:25:59 -0600 Received: from ula0132425.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 1BO7PcJV097108; Fri, 24 Dec 2021 01:25:56 -0600 From: Vignesh Raghavendra To: Dave Gerlach , Joe Hershberger , Ramon Fried , Tom Rini CC: , Vignesh Raghavendra , Grygorii Strashko Subject: [PATCH 5/8] mach-k3: am64_spl: Alias Ethernet RGMII boot to CPGMAC Date: Fri, 24 Dec 2021 12:55:33 +0530 Message-ID: <20211224072536.270251-6-vigneshr@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211224072536.270251-1-vigneshr@ti.com> References: <20211224072536.270251-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean This is required to enables spl_net boot on AM64x Signed-off-by: Vignesh Raghavendra --- arch/arm/mach-k3/include/mach/am64_spl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-k3/include/mach/am64_spl.h b/arch/arm/mach-k3/include/mach/am64_spl.h index 607b09c2e5..b4f396b2c0 100644 --- a/arch/arm/mach-k3/include/mach/am64_spl.h +++ b/arch/arm/mach-k3/include/mach/am64_spl.h @@ -12,6 +12,7 @@ #define BOOT_DEVICE_QSPI 0x02 #define BOOT_DEVICE_SPI 0x03 #define BOOT_DEVICE_ETHERNET 0x04 +#define BOOT_DEVICE_CPGMAC 0x04 #define BOOT_DEVICE_ETHERNET_RGMII 0x04 #define BOOT_DEVICE_ETHERNET_RMII 0x05 #define BOOT_DEVICE_I2C 0x06 -- 2.34.1