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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id f27sm7804046ejc.137.2021.12.30.08.48.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 08:48:36 -0800 (PST) From: Johan Jonker To: kever.yang@rock-chips.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, u-boot@lists.denx.de Subject: [PATCH v3 4/6] rockchip: tpl: change call condition rockchip_stimer_init() Date: Thu, 30 Dec 2021 17:48:23 +0100 Message-Id: <20211230164825.6489-4-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211230164825.6489-1-jbx6244@gmail.com> References: <20211230164825.6489-1-jbx6244@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE defined. Currently only rk3188 has an exception. Make this more generic and call the function rockchip_stimer_init() only when CONFIG_ROCKCHIP_STIMER_BASE is available. Signed-off-by: Johan Jonker --- Changed V3: use CONFIG_ROCKCHIP_STIMER Changed V2: use IS_ENABLED add include kconfig.h move define location so that rockchip_stimer_init() is always visible to the compiler --- arch/arm/mach-rockchip/tpl.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 3c007bb4..2b561264 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -15,6 +15,7 @@ #include #include #include +#include #if CONFIG_IS_ENABLED(BANNER_PRINT) #include @@ -29,6 +30,7 @@ __weak void rockchip_stimer_init(void) { +#if defined(CONFIG_ROCKCHIP_STIMER_BASE) /* If Timer already enabled, don't re-init it */ u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); @@ -45,6 +47,7 @@ __weak void rockchip_stimer_init(void) writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); +#endif } void board_init_f(ulong dummy) @@ -74,7 +77,9 @@ void board_init_f(ulong dummy) } /* Init secure timer */ - rockchip_stimer_init(); + if (IS_ENABLED(CONFIG_ROCKCHIP_STIMER)) + rockchip_stimer_init(); + /* Init ARM arch timer in arch/arm/cpu/ */ timer_init(); -- 2.20.1