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Mon, 3 Jan 2022 11:45:06 +0000 From: Paul Blakey To: Paul Blakey , , , Saeed Mahameed , Cong Wang , Jamal Hadi Salim , "Pravin B Shelar" , , Jiri Pirko , Jakub Kicinski , Marcelo Ricardo Leitner CC: Oz Shlomo , Vlad Buslov , Roi Dayan Subject: [PATCH net-next 3/3] net/mlx5: CT: Set flow source hint from provided tuple device Date: Mon, 3 Jan 2022 13:44:52 +0200 Message-ID: <20220103114452.406-4-paulb@nvidia.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20220103114452.406-1-paulb@nvidia.com> References: <20220103114452.406-1-paulb@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 11b86af0-3f6c-475e-7321-08d9ceae803a X-MS-TrafficTypeDiagnostic: DM6PR12MB3628:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1079; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: u4naH+cwjb4sKzqVzR16d0TfKFbgX1Ag0TYnYtN37vjVqoZxuHcuNKBYzCkUrkluf+3uQZUQhSi5jIHxbyunDHstQhqJoxB4FLJXl1DVOajtNNynPsKwRHfmyM6TMyMz5lW43m5R8RQNd7SAw2xj7ukG2wcfha/yBX5os/A9Ar/lLliE3B6yYLgB7nuaRTOFkmtgkfeJ2R9RNWpfwaNFNl0nvSgfC5xgDQi3lClhAMTJQJU1EJvR6qSe7iMIXDsUgAHcVsrYN5d3S0n7QX7NIk5YT1CRaMOA4yQxndBL+8LiaYcQX6pEHEYs3zNfy/Ds6RwY1bPsEY14SPLBdSNRdhA3DiA/0t4ebmGxJyMoL7A8+J11CatUncTldtmhGnWI3GHeSXww3cy8dWazcETw9HakCOT6IhhokXRd9B/cKpigWMcDydQVIo2O8Czury+HGvCXs5C3/bwQExbQcN8R2wKxhUs2HLhvGKow1kr4QkmN6M6ww6+0kGKy3suIHbk3DIpCAquRxBqkT3o2ooQotEOXjidx8yHkCx63xclm/od4iFOYNmBAYuWyQVcVpm5Ara5lldi4tn/mKCcrt29oEadPuNgVVz7bXCA9RQHvSKa1pKZ3f3UFh7BSA0lEbWaMuGgDwELz7UYoTLPMZmgS8HY0IB0Rloy0e4HwnbS1eyyr+emHHfYn8garAbTwEA5SyHudY/Ur6381JOqVjw3qPrA5Qs6cSdY9AFY7EbHp3CzHd7UzVBjwhG+cRNkbISvCWM0dwCYszE/7F8CpLwL8g6HvwX9G/l3XQVYQxTkmNVPxT5ma00U2Cw9tyOUYg3Js X-Forefront-Antispam-Report: CIP:12.22.5.235;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(4636009)(46966006)(40470700002)(36840700001)(40460700001)(36860700001)(356005)(1076003)(36756003)(81166007)(110136005)(47076005)(83380400001)(82310400004)(8936002)(8676002)(186003)(508600001)(4326008)(54906003)(107886003)(921005)(70206006)(6666004)(26005)(70586007)(86362001)(2906002)(426003)(336012)(2616005)(5660300002)(316002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jan 2022 11:45:11.9019 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 11b86af0-3f6c-475e-7321-08d9ceae803a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.235];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT062.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3628 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Get originating device from tuple offload metadata match ingress_ifindex, and set flow_source hint to either LOCAL for vf/sf reps, UPLINK for uplink/wire/tunnel devices/bond, or ANY (as before this patch) for all others. This allows lower layer (software steering or firmware) to insert the tuple rule only in one table (either rx or tx) instead of two (rx and tx). Signed-off-by: Paul Blakey --- drivers/net/ethernet/mellanox/mlx5/core/dev.c | 2 +- .../ethernet/mellanox/mlx5/core/en/tc_ct.c | 51 +++++++++++++++++-- .../ethernet/mellanox/mlx5/core/mlx5_core.h | 1 + 3 files changed, 49 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dev.c b/drivers/net/ethernet/mellanox/mlx5/core/dev.c index a8b84d53dfb0..ba6dad97e308 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/dev.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/dev.c @@ -538,7 +538,7 @@ int mlx5_rescan_drivers_locked(struct mlx5_core_dev *dev) return add_drivers(dev); } -static bool mlx5_same_hw_devs(struct mlx5_core_dev *dev, struct mlx5_core_dev *peer_dev) +bool mlx5_same_hw_devs(struct mlx5_core_dev *dev, struct mlx5_core_dev *peer_dev) { u64 fsystem_guid, psystem_guid; diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c index 9f33729e7fc4..4a0d38d219ed 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c @@ -14,6 +14,7 @@ #include #include #include +#include #include "lib/fs_chains.h" #include "en/tc_ct.h" @@ -326,7 +327,33 @@ mlx5_tc_ct_rule_to_tuple_nat(struct mlx5_ct_tuple *tuple, } static int -mlx5_tc_ct_set_tuple_match(struct mlx5e_priv *priv, struct mlx5_flow_spec *spec, +mlx5_tc_ct_get_flow_source_match(struct mlx5_tc_ct_priv *ct_priv, + struct net_device *ndev) +{ + struct mlx5e_priv *other_priv = netdev_priv(ndev); + struct mlx5_core_dev *mdev = ct_priv->dev; + bool vf_rep, uplink_rep; + + vf_rep = mlx5e_eswitch_vf_rep(ndev) && mlx5_same_hw_devs(mdev, other_priv->mdev); + uplink_rep = mlx5e_eswitch_uplink_rep(ndev) && mlx5_same_hw_devs(mdev, other_priv->mdev); + + if (vf_rep) + return MLX5_FLOW_CONTEXT_FLOW_SOURCE_LOCAL_VPORT; + if (uplink_rep) + return MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK; + if (is_vlan_dev(ndev)) + return mlx5_tc_ct_get_flow_source_match(ct_priv, vlan_dev_real_dev(ndev)); + if (netif_is_macvlan(ndev)) + return mlx5_tc_ct_get_flow_source_match(ct_priv, macvlan_dev_real_dev(ndev)); + if (mlx5e_get_tc_tun(ndev) || netif_is_lag_master(ndev)) + return MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK; + + return MLX5_FLOW_CONTEXT_FLOW_SOURCE_ANY_VPORT; +} + +static int +mlx5_tc_ct_set_tuple_match(struct mlx5_tc_ct_priv *ct_priv, + struct mlx5_flow_spec *spec, struct flow_rule *rule) { void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, @@ -341,8 +368,7 @@ mlx5_tc_ct_set_tuple_match(struct mlx5e_priv *priv, struct mlx5_flow_spec *spec, flow_rule_match_basic(rule, &match); - mlx5e_tc_set_ethertype(priv->mdev, &match, true, headers_c, - headers_v); + mlx5e_tc_set_ethertype(ct_priv->dev, &match, true, headers_c, headers_v); MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol, match.mask->ip_proto); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, @@ -438,6 +464,23 @@ mlx5_tc_ct_set_tuple_match(struct mlx5e_priv *priv, struct mlx5_flow_spec *spec, ntohs(match.key->flags)); } + if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META)) { + struct flow_match_meta match; + + flow_rule_match_meta(rule, &match); + + if (match.key->ingress_ifindex & match.mask->ingress_ifindex) { + struct net_device *dev; + + dev = dev_get_by_index(&init_net, match.key->ingress_ifindex); + if (dev && MLX5_CAP_ESW_FLOWTABLE(ct_priv->dev, flow_source)) + spec->flow_context.flow_source = + mlx5_tc_ct_get_flow_source_match(ct_priv, dev); + + dev_put(dev); + } + } + return 0; } @@ -770,7 +813,7 @@ mlx5_tc_ct_entry_add_rule(struct mlx5_tc_ct_priv *ct_priv, if (ct_priv->ns_type == MLX5_FLOW_NAMESPACE_FDB) attr->esw_attr->in_mdev = priv->mdev; - mlx5_tc_ct_set_tuple_match(netdev_priv(ct_priv->netdev), spec, flow_rule); + mlx5_tc_ct_set_tuple_match(ct_priv, spec, flow_rule); mlx5e_tc_match_to_reg_match(spec, ZONE_TO_REG, entry->tuple.zone, MLX5_CT_ZONE_MASK); zone_rule->rule = mlx5_tc_rule_insert(priv, spec, attr); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h index bb677329ea08..6f8baa0f2a73 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h @@ -305,5 +305,6 @@ static inline u32 mlx5_sriov_get_vf_total_msix(struct pci_dev *pdev) bool mlx5_eth_supported(struct mlx5_core_dev *dev); bool mlx5_rdma_supported(struct mlx5_core_dev *dev); bool mlx5_vnet_supported(struct mlx5_core_dev *dev); +bool mlx5_same_hw_devs(struct mlx5_core_dev *dev, struct mlx5_core_dev *peer_dev); #endif /* __MLX5_CORE_H__ */ -- 2.30.1