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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Frank Chang" <frank.chang@sifive.com>,
	"Bin Meng" <bin.meng@windriver.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-block@nongnu.org, "Jim Shu" <jim.shu@sifive.com>
Subject: [PULL 2/2] hw/sd: Add SDHC support for SD card SPI-mode
Date: Sat,  8 Jan 2022 22:58:15 +0100	[thread overview]
Message-ID: <20220108215815.551241-3-f4bug@amsat.org> (raw)
In-Reply-To: <20220108215815.551241-1-f4bug@amsat.org>

From: Frank Chang <frank.chang@sifive.com>

In SPI-mode, SD card's OCR register: Card Capacity Status (CCS) bit
is not set to 1 correclty when the assigned SD image size is larger
than 2GB (SDHC). This will cause the SD card to be indentified as SDSC
incorrectly. CCS bit should be set to 1 if we are using SDHC.

Also, as there's no power up emulation in SPI-mode.
The OCR register: Card power up status bit bit (busy) should also
be set to 1 when reset. (busy bit is set to LOW if the card has not
finished the power up routine.)

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211228125719.14712-1-frank.chang@sifive.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/sd/sd.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index c10a1e469b7..cd67a7bac8e 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -290,12 +290,6 @@ FIELD(OCR, CARD_POWER_UP,              31,  1)
                                | R_OCR_CARD_CAPACITY_MASK \
                                | R_OCR_CARD_POWER_UP_MASK)
 
-static void sd_set_ocr(SDState *sd)
-{
-    /* All voltages OK */
-    sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
-}
-
 static void sd_ocr_powerup(void *opaque)
 {
     SDState *sd = opaque;
@@ -311,6 +305,22 @@ static void sd_ocr_powerup(void *opaque)
     }
 }
 
+static void sd_set_ocr(SDState *sd)
+{
+    /* All voltages OK */
+    sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
+
+    if (sd->spi) {
+        /*
+         * We don't need to emulate power up sequence in SPI-mode.
+         * Thus, the card's power up status bit should be set to 1 when reset.
+         * The card's capacity status bit should also be set if SD card size
+         * is larger than 2GB for SDHC support.
+         */
+        sd_ocr_powerup(sd);
+    }
+}
+
 static void sd_set_scr(SDState *sd)
 {
     sd->scr[0] = 0 << 4;        /* SCR structure version 1.0 */
@@ -560,6 +570,7 @@ static void sd_reset(DeviceState *dev)
 
     sd->state = sd_idle_state;
     sd->rca = 0x0000;
+    sd->size = size;
     sd_set_ocr(sd);
     sd_set_scr(sd);
     sd_set_cid(sd);
@@ -574,7 +585,6 @@ static void sd_reset(DeviceState *dev)
     memset(sd->function_group, 0, sizeof(sd->function_group));
     sd->erase_start = INVALID_ADDRESS;
     sd->erase_end = INVALID_ADDRESS;
-    sd->size = size;
     sd->blk_len = 0x200;
     sd->pwd_len = 0;
     sd->expecting_acmd = false;
-- 
2.33.1



  parent reply	other threads:[~2022-01-08 22:02 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-08 21:58 [PULL 0/2] SD/MMC patches for 2022-01-08 Philippe Mathieu-Daudé
2022-01-08 21:58 ` [PULL 1/2] hw/sd/sdcard: Rename Write Protect Group variables Philippe Mathieu-Daudé
2022-01-08 21:58 ` Philippe Mathieu-Daudé [this message]
2022-01-10 16:02 ` [PULL 0/2] SD/MMC patches for 2022-01-08 Peter Maydell
2022-01-10 19:20   ` Philippe Mathieu-Daudé
2022-01-11 11:40     ` Peter Maydell
2022-01-11 14:20 ` Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2022-01-04  7:54 [PULL 0/2] SD/MMC patches for 2022-01-04 Philippe Mathieu-Daudé
2022-01-04  7:54 ` [PULL 2/2] hw/sd: Add SDHC support for SD card SPI-mode Philippe Mathieu-Daudé

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