From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8BA5FC433F5 for ; Wed, 12 Jan 2022 17:23:11 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E4C4C831EF; Wed, 12 Jan 2022 18:22:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="idob/V2D"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A02FF83395; Wed, 12 Jan 2022 18:21:52 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0021383395 for ; Wed, 12 Jan 2022 18:21:43 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A870761826; Wed, 12 Jan 2022 17:21:42 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EDE22C36AE5; Wed, 12 Jan 2022 17:21:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1642008102; bh=hSCpXZmhNfPYZKjk8IDzZlUEg/RF32MIsF3g4LU+B7E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=idob/V2DLiIj/pk14PMxfzn9tHlUBuOspbs67gCjWnStvzMnuhxOGSVDDzv31YQCq /8wVW9hsJOXoPmutyRsbp54VDUd0rFlQSoSJf9CCQ/X1UtAzgENQ90CeLc0Kj7xA1n 0IDA4vpBNhUDfONK6s3ZTrq9xHcThEml8Agc3nE/3pqDTslV6UsTW8FcoB/UG4frVV hZ0woBJSMszjMLXcPGksMavY9ZvhrhjcoWg+bmVxv1+DElG2U5u12CyCDSa3xMi0Or /NGH1DbJqTm6cCIXcAg+QRxepXnfMWGnOc6pbIFXtGVh7hKcDqAiXjZYa9+MpQ1PK+ EwrzBlaaS8XQg== Received: by pali.im (Postfix) id A4918768; Wed, 12 Jan 2022 18:21:41 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , =?UTF-8?q?Marek=20Beh=C3=BAn?= , Chris Packham Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell v2 06/20] tools: kwbimage: Add support for specifying CPU core Date: Wed, 12 Jan 2022 18:20:40 +0100 Message-Id: <20220112172054.5961-7-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220112172054.5961-1-pali@kernel.org> References: <20211221155416.8557-1-pali@kernel.org> <20220112172054.5961-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean For other changes it is required to know if CPU core is Sheeva or not. Therefore add a new command CPU for specifying CPU. Signed-off-by: Pali Rohár --- tools/kwbimage.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 17d3c3cf223c..44843be2c13a 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -99,6 +99,7 @@ enum image_cfg_type { IMAGE_CFG_NAND_BADBLK_LOCATION, IMAGE_CFG_NAND_ECC_MODE, IMAGE_CFG_NAND_PAGESZ, + IMAGE_CFG_CPU, IMAGE_CFG_BINARY, IMAGE_CFG_DATA, IMAGE_CFG_DATA_DELAY, @@ -129,6 +130,7 @@ static const char * const id_strs[] = { [IMAGE_CFG_NAND_BADBLK_LOCATION] = "NAND_BADBLK_LOCATION", [IMAGE_CFG_NAND_ECC_MODE] = "NAND_ECC_MODE", [IMAGE_CFG_NAND_PAGESZ] = "NAND_PAGE_SIZE", + [IMAGE_CFG_CPU] = "CPU", [IMAGE_CFG_BINARY] = "BINARY", [IMAGE_CFG_DATA] = "DATA", [IMAGE_CFG_DATA_DELAY] = "DATA_DELAY", @@ -152,6 +154,7 @@ struct image_cfg_element { enum image_cfg_type type; union { unsigned int version; + unsigned int cpu_sheeva; unsigned int bootfrom; struct { const char *file; @@ -280,6 +283,17 @@ static int image_get_bootfrom(void) return e->bootfrom; } +static int image_is_cpu_sheeva(void) +{ + struct image_cfg_element *e; + + e = image_find_option(IMAGE_CFG_CPU); + if (!e) + return 0; + + return e->cpu_sheeva; +} + /* * Compute a 8-bit checksum of a memory area. This algorithm follows * the requirements of the Marvell SoC BootROM specifications. @@ -1489,6 +1503,18 @@ static int image_create_config_parse_oneline(char *line, case IMAGE_CFG_VERSION: el->version = atoi(value1); break; + case IMAGE_CFG_CPU: + if (strcmp(value1, "FEROCEON") == 0) + el->cpu_sheeva = 0; + else if (strcmp(value1, "SHEEVA") == 0) + el->cpu_sheeva = 1; + else if (strcmp(value1, "A9") == 0) + el->cpu_sheeva = 0; + else { + fprintf(stderr, "Invalid CPU %s\n", value1); + return -1; + } + break; case IMAGE_CFG_BOOT_FROM: ret = image_boot_mode_id(value1); -- 2.20.1