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[88.130.49.239]) by smtp.gmail.com with ESMTPSA id b2sm257288ejh.221.2022.01.12.13.36.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jan 2022 13:36:52 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Subject: [PATCH 0/3] malta: Move PCI interrupt handling from gt64xxx to piix4 Date: Wed, 12 Jan 2022 22:36:25 +0100 Message-Id: <20220112213629.9126-1-shentey@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::541 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::541; envelope-from=shentey@gmail.com; helo=mail-ed1-x541.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 12 Jan 2022 16:56:17 -0500 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bernhard Beschow Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi, first-time contributor here. Inspired by an article in LWN [1] I figured I'd get my hands dirty with QEMU development. According to the article my goal is to eliminate some "accidental complexity". While studying the code I noticed some (accidental?) differences between piix3 and piix4 where the PCI interrupts are handled. Moreover, I noticed presence of global variables in piix4 which probably constitute a limitation of QOM's idea of configuration-driven machine creation. By applying piix3 concepts, i.e. moving the interrupt handling from gt64xxx to piix4, it's possible to both eliminate the differences and resolve the global variables. The patch series is structured as follows: Patch 1 eliminates the differences, patch 3 resolves the global variables. Patch 2 is a preparation for patch 3. Some of my further comments regarding the patches are: Patch 1: * pci_slot_get_pirq() looks quite malta-specific. Neither gt64xxx nor piix4 seem to be the perfect fit. So I moved it to piix4, analogous to piix3. * The i8259 property moved from MaltaState to PIIX4State looks quite redundant to the isa property. Could isa be used instead, eliminating i8259? Patch 2: * Besides piix4, there were four further cases where the PIC array was passed as the opaque parameter to the pci_map_irq_fn's. AFAICS in all other cases the DeviceState is passed instead. With this patch, consistency is esablished. * Passing PIIX4State to piix4_set_irq() paves the way for eliminating all global variables left in piix4.c (see patch 3). Comments welcome. Cheers Bernhard [1] https://lwn.net/Articles/872321/ Bernhard Beschow (3): malta: Move PCI interrupt handling from gt64xxx to piix4 pci: Always pass own DeviceState to pci_map_irq_fn's isa/piix4: Resolve global variables hw/isa/piix4.c | 62 ++++++++++++++++++++++++++++++++--- hw/mips/gt64xxx_pci.c | 62 +++-------------------------------- hw/mips/malta.c | 6 +--- hw/pci-host/sh_pci.c | 6 ++-- hw/pci-host/versatile.c | 6 ++-- hw/ppc/ppc440_pcix.c | 6 ++-- hw/ppc/ppc4xx_pci.c | 6 ++-- include/hw/mips/mips.h | 2 +- include/hw/southbridge/piix.h | 2 -- 9 files changed, 77 insertions(+), 81 deletions(-) -- 2.34.1