From: matheus.ferst@eldorado.org.br
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: danielhb413@gmail.com, richard.henderson@linaro.org,
laurent@vivier.eu, groug@kaod.org, clg@kaod.org,
Matheus Ferst <matheus.ferst@eldorado.org.br>,
david@gibson.dropbear.id.au
Subject: [RFC PATCH v3 3/3] target/ppc: Fix gen_priv_exception error value in mfspr/mtspr
Date: Thu, 13 Jan 2022 14:04:56 -0300 [thread overview]
Message-ID: <20220113170456.1796911-4-matheus.ferst@eldorado.org.br> (raw)
In-Reply-To: <20220113170456.1796911-1-matheus.ferst@eldorado.org.br>
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
The code in linux-user/ppc/cpu_loop.c expects POWERPC_EXCP_PRIV
exception with error POWERPC_EXCP_PRIV_OPC or POWERPC_EXCP_PRIV_REG,
while POWERPC_EXCP_INVAL_SPR is expected in POWERPC_EXCP_INVAL
exceptions. This mismatch caused an EXCP_DUMP with the message "Unknown
privilege violation (03)", as seen in [1].
Fixes: 9b2fadda3e01 ("ppc: Rework generation of priv and inval interrupts")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/588
[1] https://gitlab.com/qemu-project/qemu/-/issues/588
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
Is there any case where throwing a PRIV/INVAL exception with a
INVAL/PRIV error makes sense? It seems wrong, but maybe I'm missing
something... especially with the HV_EMU to program check conversion.
Also, if this patch is correct, it seems that all invalid SPR access
would be nop or privilege exceptions. In this case, is
POWERPC_EXCP_INVAL_SPR still needed?
---
target/ppc/translate.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 40232201bb..abbc3a5bb9 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4827,11 +4827,11 @@ static inline void gen_op_mfspr(DisasContext *ctx)
*/
if (sprn & 0x10) {
if (ctx->pr) {
- gen_priv_exception(ctx, POWERPC_EXCP_INVAL_SPR);
+ gen_priv_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
} else {
if (ctx->pr || sprn == 0 || sprn == 4 || sprn == 5 || sprn == 6) {
- gen_hvpriv_exception(ctx, POWERPC_EXCP_INVAL_SPR);
+ gen_hvpriv_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
}
}
@@ -5014,11 +5014,11 @@ static void gen_mtspr(DisasContext *ctx)
*/
if (sprn & 0x10) {
if (ctx->pr) {
- gen_priv_exception(ctx, POWERPC_EXCP_INVAL_SPR);
+ gen_priv_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
} else {
if (ctx->pr || sprn == 0) {
- gen_hvpriv_exception(ctx, POWERPC_EXCP_INVAL_SPR);
+ gen_hvpriv_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
}
}
--
2.25.1
next prev parent reply other threads:[~2022-01-13 17:19 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-13 17:04 [PATCH v3 0/3] linux-user/ppc: Deliver SIGTRAP on tw[i]/td[i] matheus.ferst
2022-01-13 17:04 ` [PATCH v3 1/3] linux-user/ppc: deliver SIGTRAP on POWERPC_EXCP_TRAP matheus.ferst
2022-03-04 13:27 ` Laurent Vivier
2022-01-13 17:04 ` [PATCH v3 2/3] tests/tcg/ppc64le: change signal_save_restore_xer to use SIGTRAP matheus.ferst
2022-03-04 13:28 ` Laurent Vivier
2022-01-13 17:04 ` matheus.ferst [this message]
2022-02-02 19:12 ` [RFC PATCH v3 3/3] target/ppc: Fix gen_priv_exception error value in mfspr/mtspr Fabiano Rosas
2022-03-04 14:42 ` Laurent Vivier
2022-03-10 16:26 ` Matheus K. Ferst
2022-02-01 19:02 ` [PATCH v3 0/3] linux-user/ppc: Deliver SIGTRAP on tw[i]/td[i] Matheus K. Ferst
2022-02-21 20:34 ` Matheus K. Ferst
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