[PATCH v2 0/8] arm: kirkwood: Add support for Pogoplug V4

[PATCH v2 0/8] arm: kirkwood: Add support for Pogoplug V4

[Tony Dinh]

Pogoplug V4 specifications:

Kirkwood 88F6192 SoC
800 MHz CPU
1Gbs Ethernet
128 MB RAM
128 MB NAND
1x USB 2.0
2x USB 3.0 (on PCIe bus)
1 SDHC slot
1x External SATA port (USM enclosure form factor slot)

Thanks to all v1 reviewers, all their comments were incorporated in this v2 patch series.

Changes in v2:
- Use mainline Linux DTS version
- Use canonical format for defconfig file
- Merge all constants into the pogo_v4.c file, remove pogo_v4.h
Merge constants from header file.

Tony Dinh (8):
  arm: kirkwood: Pogoplug-V4 : Add DTS files
  arm: kirkwood: Pogoplug V4 : Add board defconfig file
  arm: kirkwood: Pogoplug-V4 : Add Kconfig files
  arm: kirkwood: Pogoplug-V4 : Add board include configs file
  arm: kirkwood: Pogoplug-V4 : Add board kwbimage file
  arm: kirkwood: Pogoplug-V4 : Add board Make file
  arm: kirkwood: Pogoplug-V4 : Add board implementation
  arm: kirkwood: Pogoplug-V4 : Add board maintainer

 arch/arm/dts/Makefile                       |   1 +
 arch/arm/dts/kirkwood-pogoplug-series-4.dts | 180 ++++++++++++++++
 arch/arm/mach-kirkwood/Kconfig              |   4 +
 board/cloudengines/pogo_v4/Kconfig          |  16 ++
 board/cloudengines/pogo_v4/MAINTAINERS      |   6 +
 board/cloudengines/pogo_v4/Makefile         |  10 +
 board/cloudengines/pogo_v4/kwbimage.cfg     | 148 +++++++++++++
 board/cloudengines/pogo_v4/pogo_v4.c        | 220 ++++++++++++++++++++
 configs/pogo_v4_defconfig                   |  73 +++++++
 include/configs/pogo_v4.h                   |  94 +++++++++
 10 files changed, 752 insertions(+)
 create mode 100644 arch/arm/dts/kirkwood-pogoplug-series-4.dts
 create mode 100644 board/cloudengines/pogo_v4/Kconfig
 create mode 100644 board/cloudengines/pogo_v4/MAINTAINERS
 create mode 100644 board/cloudengines/pogo_v4/Makefile
 create mode 100644 board/cloudengines/pogo_v4/kwbimage.cfg
 create mode 100644 board/cloudengines/pogo_v4/pogo_v4.c
 create mode 100644 configs/pogo_v4_defconfig
 create mode 100644 include/configs/pogo_v4.h

-- 
2.20.1

[PATCH v2 1/8] arm: kirkwood: Pogoplug-V4 : Add DTS files

[Tony Dinh]

Add DTS files for Pogoplug V4 board

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

Changes in v2:
- Use mainline Linux DTS version

 arch/arm/dts/Makefile                       |   1 +
 arch/arm/dts/kirkwood-pogoplug-series-4.dts | 180 ++++++++++++++++++++
 2 files changed, 181 insertions(+)
 create mode 100644 arch/arm/dts/kirkwood-pogoplug-series-4.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7f622fedbd..c8be5b8ae5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -68,6 +68,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
 	kirkwood-openrd-client.dtb \
 	kirkwood-openrd-ultimate.dtb \
 	kirkwood-pogo_e02.dtb \
+	kirkwood-pogoplug-series-4.dtb \
 	kirkwood-sheevaplug.dtb
 
 dtb-$(CONFIG_MACH_S900) += \
diff --git a/arch/arm/dts/kirkwood-pogoplug-series-4.dts b/arch/arm/dts/kirkwood-pogoplug-series-4.dts
new file mode 100644
index 0000000000..5aa4669ae2
--- /dev/null
+++ b/arch/arm/dts/kirkwood-pogoplug-series-4.dts
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
+ * inspired by the board files made by Kevin Mihelich for ArchLinux,
+ * and their DTS file.
+ *
+ * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6192.dtsi"
+#include <dt-bindings/input/linux-event-codes.h>
+
+/ {
+	model = "Cloud Engines PogoPlug Series 4";
+	compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
+		     "marvell,kirkwood";
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x08000000>;
+	};
+
+	chosen {
+		stdout-path = "uart0:115200n8";
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-0 = <&pmx_button_eject>;
+		pinctrl-names = "default";
+
+		eject {
+			debounce-interval = <50>;
+			wakeup-source;
+			linux,code = <KEY_EJECTCD>;
+			label = "Eject Button";
+			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&pmx_led_green &pmx_led_red>;
+		pinctrl-names = "default";
+
+		health {
+			label = "pogoplugv4:green:health";
+			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+		fault {
+			label = "pogoplugv4:red:fault";
+			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&pinctrl {
+	pmx_sata0: pmx-sata0 {
+		marvell,pins = "mpp21";
+		marvell,function = "sata0";
+	};
+
+	pmx_sata1: pmx-sata1 {
+		marvell,pins = "mpp20";
+		marvell,function = "sata1";
+	};
+
+	pmx_sdio_cd: pmx-sdio-cd {
+		marvell,pins = "mpp27";
+		marvell,function = "gpio";
+	};
+
+	pmx_sdio_wp: pmx-sdio-wp {
+		marvell,pins = "mpp28";
+		marvell,function = "gpio";
+	};
+
+	pmx_button_eject: pmx-button-eject {
+		marvell,pins = "mpp29";
+		marvell,function = "gpio";
+	};
+
+	pmx_led_green: pmx-led-green {
+		marvell,pins = "mpp22";
+		marvell,function = "gpio";
+	};
+
+	pmx_led_red: pmx-led-red {
+		marvell,pins = "mpp24";
+		marvell,function = "gpio";
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+/*
+ * This PCIE controller has a USB 3.0 XHCI controller at 1,0
+ */
+&pciec {
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+	pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
+	pinctrl-names = "default";
+	nr-ports = <1>;
+};
+
+&sdio {
+	status = "okay";
+	pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
+	pinctrl-names = "default";
+	cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+};
+
+&nand {
+	/* 128 MiB of NAND flash */
+	chip-delay = <40>;
+	status = "okay";
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x00000000 0x200000>;
+			read-only;
+		};
+
+		partition@200000 {
+			label = "uImage";
+			reg = <0x00200000 0x300000>;
+		};
+
+		partition@500000 {
+			label = "uImage2";
+			reg = <0x00500000 0x300000>;
+		};
+
+		partition@800000 {
+			label = "failsafe";
+			reg = <0x00800000 0x800000>;
+		};
+
+		partition@1000000 {
+			label = "root";
+			reg = <0x01000000 0x7000000>;
+		};
+	};
+};
+
+&mdio {
+	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+};
+
+&eth0 {
+	status = "okay";
+	ethernet0-port@0 {
+		phy-handle = <&ethphy0>;
+	};
+};
-- 
2.20.1

[PATCH v2 2/8] arm: kirkwood: Pogoplug V4 : Add board defconfig file

[Tony Dinh]

Add board defconfig file for Pogoplug V4 board

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

Changes in v2:
- Use canonical format for defconfig file

 configs/pogo_v4_defconfig | 73 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)
 create mode 100644 configs/pogo_v4_defconfig

diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig
new file mode 100644
index 0000000000..ab78dbcea2
--- /dev/null
+++ b/configs/pogo_v4_defconfig
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_KIRKWOOD=y
+CONFIG_SYS_TEXT_BASE=0x600000
+CONFIG_TARGET_POGO_V4=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0xC0000
+CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4"
+CONFIG_IDENT_STRING="\nPogoplug V4"
+CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_BOOTSTAGE=y
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_PREBOOT=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Pogo_V4> "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_JFFS2=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:2M(u-boot),3M(uImage),3M(uImage2),8M(failsafe),112M(root)"
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+CONFIG_DM=y
+CONFIG_SATA_MV=y
+# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_MVEBU_MMC=y
+CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_DM_ETH=y
+CONFIG_MVGBE=y
+CONFIG_MII=y
+CONFIG_PCI=y
+CONFIG_PCI_MVEBU=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PCI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
-- 
2.20.1

[PATCH v2 3/8] arm: kirkwood: Pogoplug-V4 : Add Kconfig files

[Tony Dinh]

Add Kconfig files for Pogoplug V4 board

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

(no changes since v1)

 arch/arm/mach-kirkwood/Kconfig     |  4 ++++
 board/cloudengines/pogo_v4/Kconfig | 16 ++++++++++++++++
 2 files changed, 20 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/Kconfig

diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index cb4e9f29ef..e8ea4a9956 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -25,6 +25,9 @@ config TARGET_LSXL
 config TARGET_POGO_E02
 	bool "pogo_e02 Board"
 
+config TARGET_POGO_V4
+	bool "Pogoplug V4 Board"
+
 config TARGET_DNS325
 	bool "dns325 Board"
 
@@ -74,6 +77,7 @@ source "board/Marvell/guruplug/Kconfig"
 source "board/Marvell/sheevaplug/Kconfig"
 source "board/buffalo/lsxl/Kconfig"
 source "board/cloudengines/pogo_e02/Kconfig"
+source "board/cloudengines/pogo_v4/Kconfig"
 source "board/d-link/dns325/Kconfig"
 source "board/iomega/iconnect/Kconfig"
 source "board/keymile/Kconfig"
diff --git a/board/cloudengines/pogo_v4/Kconfig b/board/cloudengines/pogo_v4/Kconfig
new file mode 100644
index 0000000000..db3b76b4d4
--- /dev/null
+++ b/board/cloudengines/pogo_v4/Kconfig
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2014-2021 Tony Dinh <mibodhi@gmail.com>
+#
+if TARGET_POGO_V4
+
+config SYS_BOARD
+	default "pogo_v4"
+
+config SYS_VENDOR
+	default "cloudengines"
+
+config SYS_CONFIG_NAME
+	default "pogo_v4"
+
+endif
-- 
2.20.1

[PATCH v2 4/8] arm: kirkwood: Pogoplug-V4 : Add board include configs file

[Tony Dinh]

Add include configs file for Pogoplug V4 board

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

(no changes since v1)

 include/configs/pogo_v4.h | 94 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 94 insertions(+)
 create mode 100644 include/configs/pogo_v4.h

diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h
new file mode 100644
index 0000000000..b449986e8c
--- /dev/null
+++ b/include/configs/pogo_v4.h
@@ -0,0 +1,94 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2014-2021 Tony Dinh <mibodhi@gmail.com>
+ *
+ * Based on
+ * Copyright (C) 2012
+ * David Purdy <david.c.purdy@gmail.com>
+ *
+ * Based on Kirkwood support:
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ */
+
+#ifndef _CONFIG_POGO_V4_H
+#define _CONFIG_POGO_V4_H
+
+/*
+ * Machine type definition and ID
+ */
+#define MACH_TYPE_POGO_V4		3960
+#define CONFIG_MACH_TYPE		MACH_TYPE_POGO_V4
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_FEROCEON_88FR131		/* #define CPU Core subversion */
+#define CONFIG_KW88F6192		/* SOC Name */
+
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH		/* Declare no flash (NOR/SPI) */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_BOOTCOMMAND \
+	"setenv bootargs $(bootargs_console); " \
+	"run bootcmd_usb; " \
+	"bootm 0x00800000 0x01100000 0x2c00000"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"dtb_file=/boot/dts/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
+	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"\
+	"mtdids=nand0=orion_nand\0"\
+	"bootargs_console=console=ttyS0,115200\0" \
+	"bootcmd_usb=usb start; load usb 0:1 0x00800000 /boot/uImage; " \
+	"load usb 0:1 0x01100000 /boot/uInitrd; " \
+	"load usb 0:1 0x2c00000 $dtb_file\0"
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_FEATURE_COMMAND_EDITING	/* for netconsole */
+#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
+#define CONFIG_PHY_BASE_ADR	0
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * File system
+ */
+#ifdef CONFIG_CMD_JFFS2
+#define CONFIG_JFFS2_NAND
+#define CONFIG_JFFS2_LZO
+#endif /* CONFIG_CMD_JFFS2 */
+
+/*
+ *  SATA Driver configuration
+ */
+#ifdef CONFIG_SATA
+#define CONFIG_SYS_SATA_MAX_DEVICE	1
+#endif /* CONFIG_SATA */
+
+/*
+ * Support large disk for SATA and USB
+ */
+#define CONFIG_SYS_64BIT_LBA
+#define CONFIG_LBA48
+
+/*
+ * Kirkwood GPIO
+ */
+#define CONFIG_KIRKWOOD_GPIO
+
+#endif /* _CONFIG_POGO_V4_H */
-- 
2.20.1

[PATCH v2 5/8] arm: kirkwood: Pogoplug-V4 : Add board kwbimage file

[Tony Dinh]

Add board kwbimage file for Pogoplug V4 board

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

(no changes since v1)

 board/cloudengines/pogo_v4/kwbimage.cfg | 148 ++++++++++++++++++++++++
 1 file changed, 148 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/kwbimage.cfg

diff --git a/board/cloudengines/pogo_v4/kwbimage.cfg b/board/cloudengines/pogo_v4/kwbimage.cfg
new file mode 100644
index 0000000000..f6294fe313
--- /dev/null
+++ b/board/cloudengines/pogo_v4/kwbimage.cfg
@@ -0,0 +1,148 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2012
+# David Purdy <david.c.purdy@gmail.com>
+#
+# Based on Kirkwood support:
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafulla <at> marvell.com>
+
+# Boot Media configurations   (DONE)
+BOOT_FROM	nand
+NAND_ECC_MODE	default
+NAND_PAGE_SIZE	0x0800
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0 interface pad voltage to 1.8V (SHOULD BE SAME)
+DATA 0xffd100e0 0x1b1b1b9b
+
+#Dram initalization for SINGLE x16 CL=3 @ 200MHz   (need CL=3 @ 200MHz?)
+DATA 0xffd01400 0x43000618	# DDR Configuration register
+# bit13-0:  0x200 (200 DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xffd01404 0x34143000	# DDR Controller Control Low
+# bit 4:    0=addr/cmd in smame cycle
+# bit 5:    0=clk is driven during self refresh, we don't care for APX
+# bit 6:    0=use recommended falling edge of clk for addr/cmd
+# bit14:    0=input buffer always powered up
+# bit18:    1=cpu lock transaction enabled
+# bit23-20: 3=recommended value for CL=3 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 6= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31:    0=no additional STARTBURST delay
+
+DATA 0xffd01408 0x11012227	# DDR Timing (Low) (active cycles value +1)
+# bit3-0:   TRAS lsbs
+# bit7-4:   TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20:    TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xffd0140c 0x00000819	#  DDR Timing (High)
+# bit6-0:   TRFC
+# bit8-7:   TR2R
+# bit10-9:  TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xffd01410 0x00000001	#  DDR Address Control  (changed to Dockstar vals)
+# bit1-0:   00, Cs0width=x16
+# bit3-2:   10, Cs0size=512Mb
+# bit5-4:   00, Cs2width=nonexistent
+# bit7-6:   00, Cs1size =nonexistent
+# bit9-8:   00, Cs2width=nonexistent
+# bit11-10: 00, Cs2size =nonexistent
+# bit13-12: 00, Cs3width=nonexistent
+# bit15-14: 00, Cs3size =nonexistent
+# bit16:    0,  Cs0AddrSel
+# bit17:    0,  Cs1AddrSel
+# bit18:    0,  Cs2AddrSel
+# bit19:    0,  Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xffd01414 0x00000000	#  DDR Open Pages Control
+# bit0:    0,  OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xffd01418 0x00000000	#  DDR Operation
+# bit3-0:   0x0, DDR cmd
+# bit31-4:  0 required
+
+DATA 0xffd0141c 0x00000632	#  DDR Mode
+# bit2-0:   2, BurstLen=2 required
+# bit3:     0, BurstType=0 required
+# bit6-4:   4, CL=5				(<===== change to CL=3 ?)
+# bit7:     0, TestMode=0 normal
+# bit8:     0, DLL reset=0 normal
+# bit11-9:  6, auto-precharge write recovery ????????????
+# bit12:    0, PD must be zero
+# bit31-13: 0 required
+
+DATA 0xffd01420 0x00000040	#  DDR Extended Mode
+# bit0:    0,  DDR DLL enabled
+# bit1:    0,  DDR drive strenght normal
+# bit2:    0,  DDR ODT control lsd (disabled)
+# bit5-3:  000, required
+# bit6:    1,  DDR ODT control msb, (disabled)
+# bit9-7:  000, required
+# bit10:   0,  differential DQS enabled
+# bit11:   0, required
+# bit12:   0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xffd01424 0x0000F07F	#  DDR Controller Control High
+# bit2-0:  111, required
+# bit3  :  1  , MBUS Burst Chop disabled
+# bit6-4:  111, required
+# bit7  :  0
+# bit8  :  0  , no sample stage
+# bit9  :  0  , no half clock cycle addition to dataout
+# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 1111 required
+# bit31-16: 0    required
+
+DATA 0xffd01428 0x00085520	# DDR2 ODT Read Timing (default values)
+DATA 0xffd0147c 0x00008552	# DDR2 ODT Write Timing (default values)
+
+DATA 0xFFD01500 0x00000000	# CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x07FFFFF1	# CS[0]n Size
+# bit0:    1,  Window enabled
+# bit1:    0,  Write Protect disabled
+# bit3-2:  00, CS0 hit selected
+# bit23-4: ones, required
+# bit31-24: 0x07, Size (i.e. 128MB)
+
+DATA 0xFFD0150C 0x00000000	# CS[1]n Size, window disabled
+DATA 0xFFD01514 0x00000000	# CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000	# CS[3]n Size, window disabled
+
+DATA 0xffd01494 0x00030000	#  DDR ODT Control (Low)		 (DONE)
+# bit3-0:  2, ODT0Rd, MODT[0] asserted during read from DRAM CS1
+# bit7-4:  1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
+# bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
+# bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
+
+DATA 0xffd01498 0x00000000	#  DDR ODT Control (High)  (DONE)
+# bit1-0:  00, ODT0 controlled by ODT Control (low) register above
+# bit3-2:  01, ODT1 active NEVER!
+# bit31-4: zero, required
+
+DATA 0xffd0149c 0x0000e803	# CPU ODT Control	 (DONE)
+DATA 0xffd01480 0x00000001	# DDR Initialization Control	 (DONE)
+#bit0=1, enable DDR init upon this register write
+
+# End of Header extension
+DATA 0x0 0x0
-- 
2.20.1

[PATCH v2 6/8] arm: kirkwood: Pogoplug-V4 : Add board Make file

[Tony Dinh]

Add board Makefile for Pogoplug V4

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

Changes in v2:
- Merge all constants into the pogo_v4.c file, remove pogo_v4.h

 board/cloudengines/pogo_v4/Makefile | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/Makefile

diff --git a/board/cloudengines/pogo_v4/Makefile b/board/cloudengines/pogo_v4/Makefile
new file mode 100644
index 0000000000..511bf5ff7e
--- /dev/null
+++ b/board/cloudengines/pogo_v4/Makefile
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2014-2021 Tony Dinh <mibodhi@gmail.com>
+#
+# Based on
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+#
+
+obj-y	:= pogo_v4.o
-- 
2.20.1

[PATCH v2 7/8] arm: kirkwood: Pogoplug-V4 : Add board implementation

[Tony Dinh]

Add board implementation for Pogoplug V4

Note: currently the fdt_get_phy_addr function in this file is
duplicate in this board and many other Kirkwood boards
(eg. Sheevaplug, GoFlex Home, etc.). This function is being
factored out into common area by another patch. And because it
was written for flattree only, the patch is being rewritten to
use livetree calls.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

Changes in v2:
Merge constants from header file.

 board/cloudengines/pogo_v4/pogo_v4.c | 220 +++++++++++++++++++++++++++
 1 file changed, 220 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/pogo_v4.c

diff --git a/board/cloudengines/pogo_v4/pogo_v4.c b/board/cloudengines/pogo_v4/pogo_v4.c
new file mode 100644
index 0000000000..c85de0b22e
--- /dev/null
+++ b/board/cloudengines/pogo_v4/pogo_v4.c
@@ -0,0 +1,220 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2014-2021 Tony Dinh <mibodhi@gmail.com>
+ *
+ * Based on
+ * Copyright (C) 2012 David Purdy <david.c.purdy@gmail.com>
+ *
+ * Based on Kirkwood support:
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/soc.h>
+#include <asm/arch/mpp.h>
+#include <asm/io.h>
+#include <asm/arch/gpio.h>
+#include <asm/mach-types.h>
+#include <bootstage.h>
+#include <command.h>
+#include <init.h>
+#include <linux/bitops.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* GPIO configuration */
+#define POGO_V4_OE_LOW				(~(0))
+#define POGO_V4_OE_HIGH				(~(0))
+#define POGO_V4_OE_VAL_LOW			BIT(29)
+#define POGO_V4_OE_VAL_HIGH			0
+
+/* PHY related */
+#define MV88E1116_LED_FCTRL_REG			10
+#define MV88E1116_CPRSP_CR3_REG			21
+#define MV88E1116_MAC_CTRL_REG			21
+#define MV88E1116_PGADR_REG			22
+#define MV88E1116_RGMII_TXTM_CTRL		BIT(4)
+#define MV88E1116_RGMII_RXTM_CTRL		BIT(5)
+
+/* button */
+#define BTN_EJECT				29
+
+int board_early_init_f(void)
+{
+	/*
+	 * default gpio configuration
+	 * There are maximum 64 gpios controlled through 2 sets of registers
+	 * the  below configuration configures mainly initial LED status
+	 */
+	mvebu_config_gpio(POGO_V4_OE_VAL_LOW,
+			  POGO_V4_OE_VAL_HIGH,
+			  POGO_V4_OE_LOW, POGO_V4_OE_HIGH);
+
+	/* Multi-Purpose Pins Functionality configuration */
+	u32 kwmpp_config[] = {
+		MPP0_NF_IO2,
+		MPP1_NF_IO3,
+		MPP2_NF_IO4,
+		MPP3_NF_IO5,
+		MPP4_NF_IO6,
+		MPP5_NF_IO7,
+		MPP6_SYSRST_OUTn,
+		MPP7_GPO,
+		MPP8_TW_SDA,
+		MPP9_TW_SCK,
+		MPP10_UART0_TXD,
+		MPP11_UART0_RXD,
+		MPP12_SD_CLK,
+		MPP13_SD_CMD,
+		MPP14_SD_D0,
+		MPP15_SD_D1,
+		MPP16_SD_D2,
+		MPP17_SD_D3,
+		MPP18_NF_IO0,
+		MPP19_NF_IO1,
+		MPP20_SATA1_ACTn,
+		MPP21_SATA0_ACTn,
+		MPP22_GPIO,	/* Green LED */
+		MPP23_GPIO,
+		MPP24_GPIO,	/* Red LED */
+		MPP25_GPIO,
+		MPP26_GPIO,
+		MPP27_GPIO,
+		MPP28_GPIO,
+		MPP29_GPIO,	/* Eject button */
+		MPP30_GPIO,
+		MPP31_GPIO,
+		MPP32_GPIO,
+		MPP33_GPIO,
+		MPP34_GPIO,
+		MPP35_GPIO,	/* FR6192 has only 36 GPIOs */
+		0
+	};
+	kirkwood_mpp_conf(kwmpp_config, NULL);
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	/* Do late init to ensure successful enumeration of XHCI devices */
+	pci_init();
+	return 0;
+}
+
+int board_init(void)
+{
+	/* Boot parameters address */
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
+
+	return 0;
+}
+
+int fdt_get_phy_addr(const char *path)
+{
+	const void *fdt = gd->fdt_blob;
+	const u32 *reg;
+	const u32 *val;
+	int node, phandle, addr;
+
+	/* Find the node by its full path */
+	node = fdt_path_offset(fdt, path);
+	if (node >= 0) {
+		/* Look up phy-handle */
+		val = fdt_getprop(fdt, node, "phy-handle", NULL);
+		if (!val) {
+			/* Look up phy (deprecated property for phy handle) */
+			val = fdt_getprop(fdt, node, "phy", NULL);
+		}
+		if (val) {
+			phandle = fdt32_to_cpu(*val);
+			if (!phandle)
+				return -FDT_ERR_NOTFOUND;
+
+			/* Follow it to its node */
+			node = fdt_node_offset_by_phandle(fdt, phandle);
+			if (node) {
+				/* Look up reg */
+				reg = fdt_getprop(fdt, node, "reg", NULL);
+				if (reg) {
+					addr = fdt32_to_cpu(*reg);
+					return addr;
+				}
+			}
+		}
+	}
+	return -FDT_ERR_NOTFOUND;
+}
+
+#if defined(CONFIG_RESET_PHY_R)
+/* Configure and initialize PHY */
+void reset_phy(void)
+{
+	u16 reg;
+	int phyaddr;
+	char *name = "ethernet-controller@72000";
+	char *eth0_path = "/ocp@f1000000/ethernet-controller@72000";
+
+	if (miiphy_set_current_dev(name))
+		return;
+
+	phyaddr = fdt_get_phy_addr(eth0_path);
+	if (phyaddr < 0)
+		return;
+
+	/*
+	 * Enable RGMII delay on Tx and Rx for CPU port
+	 * Ref: sec 4.7.2 of chip datasheet
+	 */
+	miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
+	miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg);
+	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
+	miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
+	miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
+
+	/* reset the phy */
+	miiphy_reset(name, phyaddr);
+
+	printf("88E1116 Initialized on %s\n", name);
+}
+#endif /* CONFIG_RESET_PHY_R */
+
+#if CONFIG_IS_ENABLED(BOOTSTAGE)
+#define GREEN_LED	BIT(22)
+#define RED_LED		BIT(24)
+#define BOTH_LEDS	(GREEN_LED | RED_LED)
+#define NEITHER_LED	0
+
+static void set_leds(u32 leds, u32 blinking)
+{
+	struct kwgpio_registers *r;
+	u32 oe;
+	u32 bl;
+
+	r = (struct kwgpio_registers *)MVEBU_GPIO0_BASE;
+	oe = readl(&r->oe) | BOTH_LEDS;
+	writel(oe & ~leds, &r->oe);	/* active low */
+	bl = readl(&r->blink_en) & ~BOTH_LEDS;
+	writel(bl | blinking, &r->blink_en);
+}
+
+void show_boot_progress(int val)
+{
+	switch (val) {
+	case BOOTSTAGE_ID_RUN_OS:		/* booting Linux */
+		set_leds(BOTH_LEDS, NEITHER_LED);
+		break;
+	case BOOTSTAGE_ID_NET_ETH_START:	/* Ethernet initialization */
+		set_leds(GREEN_LED, GREEN_LED);
+		break;
+	default:
+		if (val < 0)	/* error */
+			set_leds(RED_LED, RED_LED);
+		break;
+	}
+}
+#endif
-- 
2.20.1

[PATCH v2 8/8] arm: kirkwood: Pogoplug-V4 : Add board maintainer

[Tony Dinh]

Add board maintainer for Pogoplug V4 board

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

(no changes since v1)

 board/cloudengines/pogo_v4/MAINTAINERS | 6 ++++++
 1 file changed, 6 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/MAINTAINERS

diff --git a/board/cloudengines/pogo_v4/MAINTAINERS b/board/cloudengines/pogo_v4/MAINTAINERS
new file mode 100644
index 0000000000..35fd7858b7
--- /dev/null
+++ b/board/cloudengines/pogo_v4/MAINTAINERS
@@ -0,0 +1,6 @@
+POGO_V4 BOARD
+M:	Tony Dinh <mibodhi@gmail.com>
+S:	Maintained
+F:	board/cloudengines/pogo_v4/
+F:	include/configs/pogo_v4.h
+F:	configs/pogo_v4_defconfig
-- 
2.20.1

Re: [PATCH v2 4/8] arm: kirkwood: Pogoplug-V4 : Add board include configs file

[Stefan Roese]

On 12/23/21 08:26, Tony Dinh wrote:
> Add include configs file for Pogoplug V4 board
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>
> ---
> 
> (no changes since v1)
> 
>   include/configs/pogo_v4.h | 94 +++++++++++++++++++++++++++++++++++++++
>   1 file changed, 94 insertions(+)
>   create mode 100644 include/configs/pogo_v4.h
> 
> diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h
> new file mode 100644
> index 0000000000..b449986e8c
> --- /dev/null
> +++ b/include/configs/pogo_v4.h
> @@ -0,0 +1,94 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2014-2021 Tony Dinh <mibodhi@gmail.com>
> + *
> + * Based on
> + * Copyright (C) 2012
> + * David Purdy <david.c.purdy@gmail.com>
> + *
> + * Based on Kirkwood support:
> + * (C) Copyright 2009
> + * Marvell Semiconductor <www.marvell.com>
> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
> + */
> +
> +#ifndef _CONFIG_POGO_V4_H
> +#define _CONFIG_POGO_V4_H
> +
> +/*
> + * Machine type definition and ID
> + */
> +#define MACH_TYPE_POGO_V4		3960
> +#define CONFIG_MACH_TYPE		MACH_TYPE_POGO_V4

Are you really using the pretty old CONFIG_MACH_TYPE to boot Linux
on this device?

> +
> +/*
> + * High Level Configuration Options (easy to change)
> + */
> +#define CONFIG_FEROCEON_88FR131		/* #define CPU Core subversion */
> +#define CONFIG_KW88F6192		/* SOC Name */

At least CONFIG_FEROCEON_88FR131 is available in Kconfig
(arch/arm/mach-kirkwood/Kconfig), so there should be no need to add it
via some header.

Please double-check other macros in this header as well for availability
in Kconfig.

> +
> +/*
> + * Commands configuration
> + */
> +#define CONFIG_SYS_NO_FLASH		/* Declare no flash (NOR/SPI) */
> +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> +
> +/*
> + * mv-common.h should be defined after CMD configs since it used them
> + * to enable certain macros
> + */
> +#include "mv-common.h"
> +
> +/*
> + * Default environment variables
> + */
> +#define CONFIG_BOOTCOMMAND \
> +	"setenv bootargs $(bootargs_console); " \
> +	"run bootcmd_usb; " \
> +	"bootm 0x00800000 0x01100000 0x2c00000"
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> +	"dtb_file=/boot/dts/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
> +	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"\
> +	"mtdids=nand0=orion_nand\0"\
> +	"bootargs_console=console=ttyS0,115200\0" \
> +	"bootcmd_usb=usb start; load usb 0:1 0x00800000 /boot/uImage; " \
> +	"load usb 0:1 0x01100000 /boot/uInitrd; " \
> +	"load usb 0:1 0x2c00000 $dtb_file\0"
> +
> +/*
> + * Ethernet Driver configuration
> + */
> +#ifdef CONFIG_CMD_NET
> +#define CONFIG_FEATURE_COMMAND_EDITING	/* for netconsole */
> +#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
> +#define CONFIG_PHY_BASE_ADR	0
> +#endif /* CONFIG_CMD_NET */
> +
> +/*
> + * File system
> + */
> +#ifdef CONFIG_CMD_JFFS2
> +#define CONFIG_JFFS2_NAND
> +#define CONFIG_JFFS2_LZO
> +#endif /* CONFIG_CMD_JFFS2 */
> +
> +/*
> + *  SATA Driver configuration
> + */
> +#ifdef CONFIG_SATA
> +#define CONFIG_SYS_SATA_MAX_DEVICE	1

This is also in Kconfig. Please make sure to not add any ad-hoc macros
here that are Kconfig options now.

Also, please drop the "#ifdef CONFIG_SATA" (and other similar ones) if
it's not really select-able.

Thanks,
Stefan

> +#endif /* CONFIG_SATA */
> +
> +/*
> + * Support large disk for SATA and USB
> + */
> +#define CONFIG_SYS_64BIT_LBA
> +#define CONFIG_LBA48
> +
> +/*
> + * Kirkwood GPIO
> + */
> +#define CONFIG_KIRKWOOD_GPIO
> +
> +#endif /* _CONFIG_POGO_V4_H */
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 1/8] arm: kirkwood: Pogoplug-V4 : Add DTS files

[Stefan Roese]

On 12/23/21 08:26, Tony Dinh wrote:
> Add DTS files for Pogoplug V4 board
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
> 
> Changes in v2:
> - Use mainline Linux DTS version
> 
>   arch/arm/dts/Makefile                       |   1 +
>   arch/arm/dts/kirkwood-pogoplug-series-4.dts | 180 ++++++++++++++++++++
>   2 files changed, 181 insertions(+)
>   create mode 100644 arch/arm/dts/kirkwood-pogoplug-series-4.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 7f622fedbd..c8be5b8ae5 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -68,6 +68,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
>   	kirkwood-openrd-client.dtb \
>   	kirkwood-openrd-ultimate.dtb \
>   	kirkwood-pogo_e02.dtb \
> +	kirkwood-pogoplug-series-4.dtb \
>   	kirkwood-sheevaplug.dtb
>   
>   dtb-$(CONFIG_MACH_S900) += \
> diff --git a/arch/arm/dts/kirkwood-pogoplug-series-4.dts b/arch/arm/dts/kirkwood-pogoplug-series-4.dts
> new file mode 100644
> index 0000000000..5aa4669ae2
> --- /dev/null
> +++ b/arch/arm/dts/kirkwood-pogoplug-series-4.dts
> @@ -0,0 +1,180 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
> + * inspired by the board files made by Kevin Mihelich for ArchLinux,
> + * and their DTS file.
> + *
> + * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
> + */
> +
> +/dts-v1/;
> +
> +#include "kirkwood.dtsi"
> +#include "kirkwood-6192.dtsi"
> +#include <dt-bindings/input/linux-event-codes.h>
> +
> +/ {
> +	model = "Cloud Engines PogoPlug Series 4";
> +	compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
> +		     "marvell,kirkwood";
> +
> +	memory {
> +		device_type = "memory";
> +		reg = <0x00000000 0x08000000>;
> +	};
> +
> +	chosen {
> +		stdout-path = "uart0:115200n8";
> +	};
> +
> +	gpio_keys {
> +		compatible = "gpio-keys";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		pinctrl-0 = <&pmx_button_eject>;
> +		pinctrl-names = "default";
> +
> +		eject {
> +			debounce-interval = <50>;
> +			wakeup-source;
> +			linux,code = <KEY_EJECTCD>;
> +			label = "Eject Button";
> +			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
> +		};
> +	};
> +
> +	gpio-leds {
> +		compatible = "gpio-leds";
> +		pinctrl-0 = <&pmx_led_green &pmx_led_red>;
> +		pinctrl-names = "default";
> +
> +		health {
> +			label = "pogoplugv4:green:health";
> +			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
> +			default-state = "on";
> +		};
> +		fault {
> +			label = "pogoplugv4:red:fault";
> +			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
> +		};
> +	};
> +};
> +
> +&pinctrl {
> +	pmx_sata0: pmx-sata0 {
> +		marvell,pins = "mpp21";
> +		marvell,function = "sata0";
> +	};
> +
> +	pmx_sata1: pmx-sata1 {
> +		marvell,pins = "mpp20";
> +		marvell,function = "sata1";
> +	};
> +
> +	pmx_sdio_cd: pmx-sdio-cd {
> +		marvell,pins = "mpp27";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_sdio_wp: pmx-sdio-wp {
> +		marvell,pins = "mpp28";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_button_eject: pmx-button-eject {
> +		marvell,pins = "mpp29";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_led_green: pmx-led-green {
> +		marvell,pins = "mpp22";
> +		marvell,function = "gpio";
> +	};
> +
> +	pmx_led_red: pmx-led-red {
> +		marvell,pins = "mpp24";
> +		marvell,function = "gpio";
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +/*
> + * This PCIE controller has a USB 3.0 XHCI controller at 1,0
> + */
> +&pciec {
> +	status = "okay";
> +};
> +
> +&pcie0 {
> +	status = "okay";
> +};
> +
> +&sata {
> +	status = "okay";
> +	pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
> +	pinctrl-names = "default";
> +	nr-ports = <1>;
> +};
> +
> +&sdio {
> +	status = "okay";
> +	pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
> +	pinctrl-names = "default";
> +	cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
> +	wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&nand {
> +	/* 128 MiB of NAND flash */
> +	chip-delay = <40>;
> +	status = "okay";
> +	partitions {
> +		compatible = "fixed-partitions";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		partition@0 {
> +			label = "u-boot";
> +			reg = <0x00000000 0x200000>;
> +			read-only;
> +		};
> +
> +		partition@200000 {
> +			label = "uImage";
> +			reg = <0x00200000 0x300000>;
> +		};
> +
> +		partition@500000 {
> +			label = "uImage2";
> +			reg = <0x00500000 0x300000>;
> +		};
> +
> +		partition@800000 {
> +			label = "failsafe";
> +			reg = <0x00800000 0x800000>;
> +		};
> +
> +		partition@1000000 {
> +			label = "root";
> +			reg = <0x01000000 0x7000000>;
> +		};
> +	};
> +};
> +
> +&mdio {
> +	status = "okay";
> +
> +	ethphy0: ethernet-phy@0 {
> +		reg = <0>;
> +	};
> +};
> +
> +&eth0 {
> +	status = "okay";
> +	ethernet0-port@0 {
> +		phy-handle = <&ethphy0>;
> +	};
> +};
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 2/8] arm: kirkwood: Pogoplug V4 : Add board defconfig file

[Stefan Roese]

On 12/23/21 08:26, Tony Dinh wrote:
> Add board defconfig file for Pogoplug V4 board
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>

There are very likely things missing here. Please see me comment to
patch 4/8 on this.

Thanks,
Stefan

> ---
> 
> Changes in v2:
> - Use canonical format for defconfig file
> 
>   configs/pogo_v4_defconfig | 73 +++++++++++++++++++++++++++++++++++++++
>   1 file changed, 73 insertions(+)
>   create mode 100644 configs/pogo_v4_defconfig
> 
> diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig
> new file mode 100644
> index 0000000000..ab78dbcea2
> --- /dev/null
> +++ b/configs/pogo_v4_defconfig
> @@ -0,0 +1,73 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_SYS_DCACHE_OFF=y
> +CONFIG_ARCH_CPU_INIT=y
> +CONFIG_SYS_THUMB_BUILD=y
> +CONFIG_ARCH_KIRKWOOD=y
> +CONFIG_SYS_TEXT_BASE=0x600000
> +CONFIG_TARGET_POGO_V4=y
> +CONFIG_ENV_SIZE=0x20000
> +CONFIG_ENV_OFFSET=0xC0000
> +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4"
> +CONFIG_IDENT_STRING="\nPogoplug V4"
> +CONFIG_SYS_LOAD_ADDR=0x800000
> +CONFIG_BOOTSTAGE=y
> +CONFIG_SHOW_BOOT_PROGRESS=y
> +CONFIG_BOOTDELAY=10
> +CONFIG_USE_PREBOOT=y
> +CONFIG_BOARD_LATE_INIT=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_SYS_PROMPT="Pogo_V4> "
> +CONFIG_CMD_BOOTZ=y
> +# CONFIG_BOOTM_PLAN9 is not set
> +# CONFIG_BOOTM_RTEMS is not set
> +# CONFIG_BOOTM_VXWORKS is not set
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> +CONFIG_CMD_NAND=y
> +CONFIG_CMD_PCI=y
> +CONFIG_CMD_SATA=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_MII=y
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_SNTP=y
> +CONFIG_CMD_DNS=y
> +CONFIG_CMD_EXT2=y
> +CONFIG_CMD_EXT4=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +CONFIG_CMD_JFFS2=y
> +CONFIG_CMD_MTDPARTS=y
> +CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
> +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:2M(u-boot),3M(uImage),3M(uImage2),8M(failsafe),112M(root)"
> +CONFIG_CMD_UBI=y
> +CONFIG_ISO_PARTITION=y
> +CONFIG_EFI_PARTITION=y
> +CONFIG_PARTITION_TYPE_GUID=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_ENV_OVERWRITE=y
> +CONFIG_ENV_IS_IN_NAND=y
> +CONFIG_VERSION_VARIABLE=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_NETCONSOLE=y
> +CONFIG_DM=y
> +CONFIG_SATA_MV=y
> +# CONFIG_MMC_HW_PARTITIONING is not set
> +CONFIG_MVEBU_MMC=y
> +CONFIG_MTD=y
> +CONFIG_MTD_RAW_NAND=y
> +CONFIG_DM_ETH=y
> +CONFIG_MVGBE=y
> +CONFIG_MII=y
> +CONFIG_PCI=y
> +CONFIG_PCI_MVEBU=y
> +CONFIG_DM_RTC=y
> +CONFIG_RTC_EMULATION=y
> +CONFIG_SYS_NS16550=y
> +CONFIG_USB=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_XHCI_PCI=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_STORAGE=y
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 3/8] arm: kirkwood: Pogoplug-V4 : Add Kconfig files

[Stefan Roese]

On 12/23/21 08:26, Tony Dinh wrote:
> Add Kconfig files for Pogoplug V4 board
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>
> ---
> 
> (no changes since v1)
> 
>   arch/arm/mach-kirkwood/Kconfig     |  4 ++++
>   board/cloudengines/pogo_v4/Kconfig | 16 ++++++++++++++++
>   2 files changed, 20 insertions(+)
>   create mode 100644 board/cloudengines/pogo_v4/Kconfig
> 
> diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
> index cb4e9f29ef..e8ea4a9956 100644
> --- a/arch/arm/mach-kirkwood/Kconfig
> +++ b/arch/arm/mach-kirkwood/Kconfig
> @@ -25,6 +25,9 @@ config TARGET_LSXL
>   config TARGET_POGO_E02
>   	bool "pogo_e02 Board"
>   
> +config TARGET_POGO_V4
> +	bool "Pogoplug V4 Board"
> +

I now see, that the KW88F6281 Kconfig support was just recently added to
this file by Tom. Please re-base your patchset on top of latest master.

Thanks,
Stefan

>   config TARGET_DNS325
>   	bool "dns325 Board"
>   
> @@ -74,6 +77,7 @@ source "board/Marvell/guruplug/Kconfig"
>   source "board/Marvell/sheevaplug/Kconfig"
>   source "board/buffalo/lsxl/Kconfig"
>   source "board/cloudengines/pogo_e02/Kconfig"
> +source "board/cloudengines/pogo_v4/Kconfig"
>   source "board/d-link/dns325/Kconfig"
>   source "board/iomega/iconnect/Kconfig"
>   source "board/keymile/Kconfig"
> diff --git a/board/cloudengines/pogo_v4/Kconfig b/board/cloudengines/pogo_v4/Kconfig
> new file mode 100644
> index 0000000000..db3b76b4d4
> --- /dev/null
> +++ b/board/cloudengines/pogo_v4/Kconfig
> @@ -0,0 +1,16 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# (C) Copyright 2014-2021 Tony Dinh <mibodhi@gmail.com>
> +#
> +if TARGET_POGO_V4
> +
> +config SYS_BOARD
> +	default "pogo_v4"
> +
> +config SYS_VENDOR
> +	default "cloudengines"
> +
> +config SYS_CONFIG_NAME
> +	default "pogo_v4"
> +
> +endif
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 5/8] arm: kirkwood: Pogoplug-V4 : Add board kwbimage file

[Stefan Roese]

On 12/23/21 08:26, Tony Dinh wrote:
> Add board kwbimage file for Pogoplug V4 board
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
> 
> (no changes since v1)
> 
>   board/cloudengines/pogo_v4/kwbimage.cfg | 148 ++++++++++++++++++++++++
>   1 file changed, 148 insertions(+)
>   create mode 100644 board/cloudengines/pogo_v4/kwbimage.cfg
> 
> diff --git a/board/cloudengines/pogo_v4/kwbimage.cfg b/board/cloudengines/pogo_v4/kwbimage.cfg
> new file mode 100644
> index 0000000000..f6294fe313
> --- /dev/null
> +++ b/board/cloudengines/pogo_v4/kwbimage.cfg
> @@ -0,0 +1,148 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2012
> +# David Purdy <david.c.purdy@gmail.com>
> +#
> +# Based on Kirkwood support:
> +# (C) Copyright 2009
> +# Marvell Semiconductor <www.marvell.com>
> +# Written-by: Prafulla Wadaskar <prafulla <at> marvell.com>
> +
> +# Boot Media configurations   (DONE)
> +BOOT_FROM	nand
> +NAND_ECC_MODE	default
> +NAND_PAGE_SIZE	0x0800
> +
> +# SOC registers configuration using bootrom header extension
> +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
> +
> +# Configure RGMII-0 interface pad voltage to 1.8V (SHOULD BE SAME)
> +DATA 0xffd100e0 0x1b1b1b9b
> +
> +#Dram initalization for SINGLE x16 CL=3 @ 200MHz   (need CL=3 @ 200MHz?)
> +DATA 0xffd01400 0x43000618	# DDR Configuration register
> +# bit13-0:  0x200 (200 DDR2 clks refresh rate)
> +# bit23-14: zero
> +# bit24: 1= enable exit self refresh mode on DDR access
> +# bit25: 1 required
> +# bit29-26: zero
> +# bit31-30: 01
> +
> +DATA 0xffd01404 0x34143000	# DDR Controller Control Low
> +# bit 4:    0=addr/cmd in smame cycle
> +# bit 5:    0=clk is driven during self refresh, we don't care for APX
> +# bit 6:    0=use recommended falling edge of clk for addr/cmd
> +# bit14:    0=input buffer always powered up
> +# bit18:    1=cpu lock transaction enabled
> +# bit23-20: 3=recommended value for CL=3 and STARTBURST_DEL disabled bit31=0
> +# bit27-24: 6= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
> +# bit30-28: 3 required
> +# bit31:    0=no additional STARTBURST delay
> +
> +DATA 0xffd01408 0x11012227	# DDR Timing (Low) (active cycles value +1)
> +# bit3-0:   TRAS lsbs
> +# bit7-4:   TRCD
> +# bit11- 8: TRP
> +# bit15-12: TWR
> +# bit19-16: TWTR
> +# bit20:    TRAS msb
> +# bit23-21: 0x0
> +# bit27-24: TRRD
> +# bit31-28: TRTP
> +
> +DATA 0xffd0140c 0x00000819	#  DDR Timing (High)
> +# bit6-0:   TRFC
> +# bit8-7:   TR2R
> +# bit10-9:  TR2W
> +# bit12-11: TW2W
> +# bit31-13: zero required
> +
> +DATA 0xffd01410 0x00000001	#  DDR Address Control  (changed to Dockstar vals)
> +# bit1-0:   00, Cs0width=x16
> +# bit3-2:   10, Cs0size=512Mb
> +# bit5-4:   00, Cs2width=nonexistent
> +# bit7-6:   00, Cs1size =nonexistent
> +# bit9-8:   00, Cs2width=nonexistent
> +# bit11-10: 00, Cs2size =nonexistent
> +# bit13-12: 00, Cs3width=nonexistent
> +# bit15-14: 00, Cs3size =nonexistent
> +# bit16:    0,  Cs0AddrSel
> +# bit17:    0,  Cs1AddrSel
> +# bit18:    0,  Cs2AddrSel
> +# bit19:    0,  Cs3AddrSel
> +# bit31-20: 0 required
> +
> +DATA 0xffd01414 0x00000000	#  DDR Open Pages Control
> +# bit0:    0,  OpenPage enabled
> +# bit31-1: 0 required
> +
> +DATA 0xffd01418 0x00000000	#  DDR Operation
> +# bit3-0:   0x0, DDR cmd
> +# bit31-4:  0 required
> +
> +DATA 0xffd0141c 0x00000632	#  DDR Mode
> +# bit2-0:   2, BurstLen=2 required
> +# bit3:     0, BurstType=0 required
> +# bit6-4:   4, CL=5				(<===== change to CL=3 ?)
> +# bit7:     0, TestMode=0 normal
> +# bit8:     0, DLL reset=0 normal
> +# bit11-9:  6, auto-precharge write recovery ????????????
> +# bit12:    0, PD must be zero
> +# bit31-13: 0 required
> +
> +DATA 0xffd01420 0x00000040	#  DDR Extended Mode
> +# bit0:    0,  DDR DLL enabled
> +# bit1:    0,  DDR drive strenght normal
> +# bit2:    0,  DDR ODT control lsd (disabled)
> +# bit5-3:  000, required
> +# bit6:    1,  DDR ODT control msb, (disabled)
> +# bit9-7:  000, required
> +# bit10:   0,  differential DQS enabled
> +# bit11:   0, required
> +# bit12:   0, DDR output buffer enabled
> +# bit31-13: 0 required
> +
> +DATA 0xffd01424 0x0000F07F	#  DDR Controller Control High
> +# bit2-0:  111, required
> +# bit3  :  1  , MBUS Burst Chop disabled
> +# bit6-4:  111, required
> +# bit7  :  0
> +# bit8  :  0  , no sample stage
> +# bit9  :  0  , no half clock cycle addition to dataout
> +# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
> +# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
> +# bit15-12: 1111 required
> +# bit31-16: 0    required
> +
> +DATA 0xffd01428 0x00085520	# DDR2 ODT Read Timing (default values)
> +DATA 0xffd0147c 0x00008552	# DDR2 ODT Write Timing (default values)
> +
> +DATA 0xFFD01500 0x00000000	# CS[0]n Base address to 0x0
> +DATA 0xFFD01504 0x07FFFFF1	# CS[0]n Size
> +# bit0:    1,  Window enabled
> +# bit1:    0,  Write Protect disabled
> +# bit3-2:  00, CS0 hit selected
> +# bit23-4: ones, required
> +# bit31-24: 0x07, Size (i.e. 128MB)
> +
> +DATA 0xFFD0150C 0x00000000	# CS[1]n Size, window disabled
> +DATA 0xFFD01514 0x00000000	# CS[2]n Size, window disabled
> +DATA 0xFFD0151C 0x00000000	# CS[3]n Size, window disabled
> +
> +DATA 0xffd01494 0x00030000	#  DDR ODT Control (Low)		 (DONE)
> +# bit3-0:  2, ODT0Rd, MODT[0] asserted during read from DRAM CS1
> +# bit7-4:  1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
> +# bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
> +# bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
> +
> +DATA 0xffd01498 0x00000000	#  DDR ODT Control (High)  (DONE)
> +# bit1-0:  00, ODT0 controlled by ODT Control (low) register above
> +# bit3-2:  01, ODT1 active NEVER!
> +# bit31-4: zero, required
> +
> +DATA 0xffd0149c 0x0000e803	# CPU ODT Control	 (DONE)
> +DATA 0xffd01480 0x00000001	# DDR Initialization Control	 (DONE)
> +#bit0=1, enable DDR init upon this register write
> +
> +# End of Header extension
> +DATA 0x0 0x0
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 4/8] arm: kirkwood: Pogoplug-V4 : Add board include configs file

[Tom Rini]

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On Thu, Jan 13, 2022 at 02:32:00PM +0100, Stefan Roese wrote:
> On 12/23/21 08:26, Tony Dinh wrote:
> > Add include configs file for Pogoplug V4 board
> > 
> > Signed-off-by: Tony Dinh <mibodhi@gmail.com>
> > ---
> > 
> > (no changes since v1)
> > 
> >   include/configs/pogo_v4.h | 94 +++++++++++++++++++++++++++++++++++++++
> >   1 file changed, 94 insertions(+)
> >   create mode 100644 include/configs/pogo_v4.h
> > 
> > diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h
> > new file mode 100644
> > index 0000000000..b449986e8c
> > --- /dev/null
> > +++ b/include/configs/pogo_v4.h
> > @@ -0,0 +1,94 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright (C) 2014-2021 Tony Dinh <mibodhi@gmail.com>
> > + *
> > + * Based on
> > + * Copyright (C) 2012
> > + * David Purdy <david.c.purdy@gmail.com>
> > + *
> > + * Based on Kirkwood support:
> > + * (C) Copyright 2009
> > + * Marvell Semiconductor <www.marvell.com>
> > + * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
> > + */
> > +
> > +#ifndef _CONFIG_POGO_V4_H
> > +#define _CONFIG_POGO_V4_H
> > +
> > +/*
> > + * Machine type definition and ID
> > + */
> > +#define MACH_TYPE_POGO_V4		3960
> > +#define CONFIG_MACH_TYPE		MACH_TYPE_POGO_V4
> 
> Are you really using the pretty old CONFIG_MACH_TYPE to boot Linux
> on this device?
> 
> > +
> > +/*
> > + * High Level Configuration Options (easy to change)
> > + */
> > +#define CONFIG_FEROCEON_88FR131		/* #define CPU Core subversion */
> > +#define CONFIG_KW88F6192		/* SOC Name */
> 
> At least CONFIG_FEROCEON_88FR131 is available in Kconfig
> (arch/arm/mach-kirkwood/Kconfig), so there should be no need to add it
> via some header.
> 
> Please double-check other macros in this header as well for availability
> in Kconfig.

At this point you can now make CI do this for you as we have a test that
will fail if there's unmigrated symbols in your board header file.  The
logic can also be copy/pasted out to a script to run by yourself too.

-- 
Tom

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Re: [PATCH v2 6/8] arm: kirkwood: Pogoplug-V4 : Add board Make file

[Stefan Roese]

On 12/23/21 08:26, Tony Dinh wrote:
> Add board Makefile for Pogoplug V4
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>

Nitpicking: In the subject you write "Make file". Please change this
to "Makefile" there as well.

Other than this:

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
> 
> Changes in v2:
> - Merge all constants into the pogo_v4.c file, remove pogo_v4.h
> 
>   board/cloudengines/pogo_v4/Makefile | 10 ++++++++++
>   1 file changed, 10 insertions(+)
>   create mode 100644 board/cloudengines/pogo_v4/Makefile
> 
> diff --git a/board/cloudengines/pogo_v4/Makefile b/board/cloudengines/pogo_v4/Makefile
> new file mode 100644
> index 0000000000..511bf5ff7e
> --- /dev/null
> +++ b/board/cloudengines/pogo_v4/Makefile
> @@ -0,0 +1,10 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# (C) Copyright 2014-2021 Tony Dinh <mibodhi@gmail.com>
> +#
> +# Based on
> +# Marvell Semiconductor <www.marvell.com>
> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
> +#
> +
> +obj-y	:= pogo_v4.o
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 7/8] arm: kirkwood: Pogoplug-V4 : Add board implementation

[Stefan Roese]

On 12/23/21 08:26, Tony Dinh wrote:
> Add board implementation for Pogoplug V4
> 
> Note: currently the fdt_get_phy_addr function in this file is
> duplicate in this board and many other Kirkwood boards
> (eg. Sheevaplug, GoFlex Home, etc.). This function is being
> factored out into common area by another patch. And because it
> was written for flattree only, the patch is being rewritten to
> use livetree calls.
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>
> ---
> 
> Changes in v2:
> Merge constants from header file.
> 
>   board/cloudengines/pogo_v4/pogo_v4.c | 220 +++++++++++++++++++++++++++
>   1 file changed, 220 insertions(+)
>   create mode 100644 board/cloudengines/pogo_v4/pogo_v4.c

Ups. And now you bring in the C file for the Makefile from patch 6/8?
This will make problems with git bi-secting. Please squash both patches
into one instead.

Thanks,
Stefan

> diff --git a/board/cloudengines/pogo_v4/pogo_v4.c b/board/cloudengines/pogo_v4/pogo_v4.c
> new file mode 100644
> index 0000000000..c85de0b22e
> --- /dev/null
> +++ b/board/cloudengines/pogo_v4/pogo_v4.c
> @@ -0,0 +1,220 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2014-2021 Tony Dinh <mibodhi@gmail.com>
> + *
> + * Based on
> + * Copyright (C) 2012 David Purdy <david.c.purdy@gmail.com>
> + *
> + * Based on Kirkwood support:
> + * (C) Copyright 2009
> + * Marvell Semiconductor <www.marvell.com>
> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
> + */
> +
> +#include <common.h>
> +#include <miiphy.h>
> +#include <asm/arch/cpu.h>
> +#include <asm/arch/soc.h>
> +#include <asm/arch/mpp.h>
> +#include <asm/io.h>
> +#include <asm/arch/gpio.h>
> +#include <asm/mach-types.h>
> +#include <bootstage.h>
> +#include <command.h>
> +#include <init.h>
> +#include <linux/bitops.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/* GPIO configuration */
> +#define POGO_V4_OE_LOW				(~(0))
> +#define POGO_V4_OE_HIGH				(~(0))
> +#define POGO_V4_OE_VAL_LOW			BIT(29)
> +#define POGO_V4_OE_VAL_HIGH			0
> +
> +/* PHY related */
> +#define MV88E1116_LED_FCTRL_REG			10
> +#define MV88E1116_CPRSP_CR3_REG			21
> +#define MV88E1116_MAC_CTRL_REG			21
> +#define MV88E1116_PGADR_REG			22
> +#define MV88E1116_RGMII_TXTM_CTRL		BIT(4)
> +#define MV88E1116_RGMII_RXTM_CTRL		BIT(5)
> +
> +/* button */
> +#define BTN_EJECT				29
> +
> +int board_early_init_f(void)
> +{
> +	/*
> +	 * default gpio configuration
> +	 * There are maximum 64 gpios controlled through 2 sets of registers
> +	 * the  below configuration configures mainly initial LED status
> +	 */
> +	mvebu_config_gpio(POGO_V4_OE_VAL_LOW,
> +			  POGO_V4_OE_VAL_HIGH,
> +			  POGO_V4_OE_LOW, POGO_V4_OE_HIGH);
> +
> +	/* Multi-Purpose Pins Functionality configuration */
> +	u32 kwmpp_config[] = {
> +		MPP0_NF_IO2,
> +		MPP1_NF_IO3,
> +		MPP2_NF_IO4,
> +		MPP3_NF_IO5,
> +		MPP4_NF_IO6,
> +		MPP5_NF_IO7,
> +		MPP6_SYSRST_OUTn,
> +		MPP7_GPO,
> +		MPP8_TW_SDA,
> +		MPP9_TW_SCK,
> +		MPP10_UART0_TXD,
> +		MPP11_UART0_RXD,
> +		MPP12_SD_CLK,
> +		MPP13_SD_CMD,
> +		MPP14_SD_D0,
> +		MPP15_SD_D1,
> +		MPP16_SD_D2,
> +		MPP17_SD_D3,
> +		MPP18_NF_IO0,
> +		MPP19_NF_IO1,
> +		MPP20_SATA1_ACTn,
> +		MPP21_SATA0_ACTn,
> +		MPP22_GPIO,	/* Green LED */
> +		MPP23_GPIO,
> +		MPP24_GPIO,	/* Red LED */
> +		MPP25_GPIO,
> +		MPP26_GPIO,
> +		MPP27_GPIO,
> +		MPP28_GPIO,
> +		MPP29_GPIO,	/* Eject button */
> +		MPP30_GPIO,
> +		MPP31_GPIO,
> +		MPP32_GPIO,
> +		MPP33_GPIO,
> +		MPP34_GPIO,
> +		MPP35_GPIO,	/* FR6192 has only 36 GPIOs */
> +		0
> +	};
> +	kirkwood_mpp_conf(kwmpp_config, NULL);
> +
> +	return 0;
> +}
> +
> +int board_late_init(void)
> +{
> +	/* Do late init to ensure successful enumeration of XHCI devices */
> +	pci_init();
> +	return 0;
> +}
> +
> +int board_init(void)
> +{
> +	/* Boot parameters address */
> +	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
> +
> +	return 0;
> +}
> +
> +int fdt_get_phy_addr(const char *path)
> +{
> +	const void *fdt = gd->fdt_blob;
> +	const u32 *reg;
> +	const u32 *val;
> +	int node, phandle, addr;
> +
> +	/* Find the node by its full path */
> +	node = fdt_path_offset(fdt, path);
> +	if (node >= 0) {
> +		/* Look up phy-handle */
> +		val = fdt_getprop(fdt, node, "phy-handle", NULL);
> +		if (!val) {
> +			/* Look up phy (deprecated property for phy handle) */
> +			val = fdt_getprop(fdt, node, "phy", NULL);
> +		}
> +		if (val) {
> +			phandle = fdt32_to_cpu(*val);
> +			if (!phandle)
> +				return -FDT_ERR_NOTFOUND;
> +
> +			/* Follow it to its node */
> +			node = fdt_node_offset_by_phandle(fdt, phandle);
> +			if (node) {
> +				/* Look up reg */
> +				reg = fdt_getprop(fdt, node, "reg", NULL);
> +				if (reg) {
> +					addr = fdt32_to_cpu(*reg);
> +					return addr;
> +				}
> +			}
> +		}
> +	}
> +	return -FDT_ERR_NOTFOUND;
> +}
> +
> +#if defined(CONFIG_RESET_PHY_R)
> +/* Configure and initialize PHY */
> +void reset_phy(void)
> +{
> +	u16 reg;
> +	int phyaddr;
> +	char *name = "ethernet-controller@72000";
> +	char *eth0_path = "/ocp@f1000000/ethernet-controller@72000";
> +
> +	if (miiphy_set_current_dev(name))
> +		return;
> +
> +	phyaddr = fdt_get_phy_addr(eth0_path);
> +	if (phyaddr < 0)
> +		return;
> +
> +	/*
> +	 * Enable RGMII delay on Tx and Rx for CPU port
> +	 * Ref: sec 4.7.2 of chip datasheet
> +	 */
> +	miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
> +	miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg);
> +	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
> +	miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
> +	miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
> +
> +	/* reset the phy */
> +	miiphy_reset(name, phyaddr);
> +
> +	printf("88E1116 Initialized on %s\n", name);
> +}
> +#endif /* CONFIG_RESET_PHY_R */
> +
> +#if CONFIG_IS_ENABLED(BOOTSTAGE)
> +#define GREEN_LED	BIT(22)
> +#define RED_LED		BIT(24)
> +#define BOTH_LEDS	(GREEN_LED | RED_LED)
> +#define NEITHER_LED	0
> +
> +static void set_leds(u32 leds, u32 blinking)
> +{
> +	struct kwgpio_registers *r;
> +	u32 oe;
> +	u32 bl;
> +
> +	r = (struct kwgpio_registers *)MVEBU_GPIO0_BASE;
> +	oe = readl(&r->oe) | BOTH_LEDS;
> +	writel(oe & ~leds, &r->oe);	/* active low */
> +	bl = readl(&r->blink_en) & ~BOTH_LEDS;
> +	writel(bl | blinking, &r->blink_en);
> +}
> +
> +void show_boot_progress(int val)
> +{
> +	switch (val) {
> +	case BOOTSTAGE_ID_RUN_OS:		/* booting Linux */
> +		set_leds(BOTH_LEDS, NEITHER_LED);
> +		break;
> +	case BOOTSTAGE_ID_NET_ETH_START:	/* Ethernet initialization */
> +		set_leds(GREEN_LED, GREEN_LED);
> +		break;
> +	default:
> +		if (val < 0)	/* error */
> +			set_leds(RED_LED, RED_LED);
> +		break;
> +	}
> +}
> +#endif
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 8/8] arm: kirkwood: Pogoplug-V4 : Add board maintainer

[Stefan Roese]

On 12/23/21 08:26, Tony Dinh wrote:
> Add board maintainer for Pogoplug V4 board
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>

Hmm, just this one file?

I would prefer to not have this many patches in this series and squash
at least all files in the board directory into one. Or also integrate
the defconfig and include/configs header. This is my personal taste,
other might have different preferences here.

Thanks,
Stefan

> ---
> 
> (no changes since v1)
> 
>   board/cloudengines/pogo_v4/MAINTAINERS | 6 ++++++
>   1 file changed, 6 insertions(+)
>   create mode 100644 board/cloudengines/pogo_v4/MAINTAINERS
> 
> diff --git a/board/cloudengines/pogo_v4/MAINTAINERS b/board/cloudengines/pogo_v4/MAINTAINERS
> new file mode 100644
> index 0000000000..35fd7858b7
> --- /dev/null
> +++ b/board/cloudengines/pogo_v4/MAINTAINERS
> @@ -0,0 +1,6 @@
> +POGO_V4 BOARD
> +M:	Tony Dinh <mibodhi@gmail.com>
> +S:	Maintained
> +F:	board/cloudengines/pogo_v4/
> +F:	include/configs/pogo_v4.h
> +F:	configs/pogo_v4_defconfig
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 8/8] arm: kirkwood: Pogoplug-V4 : Add board maintainer

[Tony Dinh]

Hi Stefan & Tom,

On Thu, Jan 13, 2022 at 5:40 AM Stefan Roese <sr@denx.de> wrote:
>
> On 12/23/21 08:26, Tony Dinh wrote:
> > Add board maintainer for Pogoplug V4 board
> >
> > Signed-off-by: Tony Dinh <mibodhi@gmail.com>
>
> Hmm, just this one file?
>
> I would prefer to not have this many patches in this series and squash
> at least all files in the board directory into one. Or also integrate
> the defconfig and include/configs header. This is my personal taste,
> other might have different preferences here.

Agreed. I'd prefer less patches, too :) And will rebase to the latest
master to take care of the defconfig/header issue (I think I had this
v2 series done before Tom did the move for some). And will remove the
obsolete MACH_TYPE (that was remnant of when we still wanted to boot
old kernels).

I will send in v3 series.

Thanks,
Tony


> Thanks,
> Stefan
>
> > ---
> >
> > (no changes since v1)
> >
> >   board/cloudengines/pogo_v4/MAINTAINERS | 6 ++++++
> >   1 file changed, 6 insertions(+)
> >   create mode 100644 board/cloudengines/pogo_v4/MAINTAINERS
> >
> > diff --git a/board/cloudengines/pogo_v4/MAINTAINERS b/board/cloudengines/pogo_v4/MAINTAINERS
> > new file mode 100644
> > index 0000000000..35fd7858b7
> > --- /dev/null
> > +++ b/board/cloudengines/pogo_v4/MAINTAINERS
> > @@ -0,0 +1,6 @@
> > +POGO_V4 BOARD
> > +M:   Tony Dinh <mibodhi@gmail.com>
> > +S:   Maintained
> > +F:   board/cloudengines/pogo_v4/
> > +F:   include/configs/pogo_v4.h
> > +F:   configs/pogo_v4_defconfig
> >
>
> Viele Grüße,
> Stefan Roese
>
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH v2 4/8] arm: kirkwood: Pogoplug-V4 : Add board include configs file

[Tony Dinh]

Hi Tom,

On Thu, Jan 13, 2022 at 5:36 AM Tom Rini <trini@konsulko.com> wrote:
>
> On Thu, Jan 13, 2022 at 02:32:00PM +0100, Stefan Roese wrote:
> > On 12/23/21 08:26, Tony Dinh wrote:
> > > Add include configs file for Pogoplug V4 board
> > >
> > > Signed-off-by: Tony Dinh <mibodhi@gmail.com>
> > > ---
> > >
> > > (no changes since v1)
> > >
> > >   include/configs/pogo_v4.h | 94 +++++++++++++++++++++++++++++++++++++++
> > >   1 file changed, 94 insertions(+)
> > >   create mode 100644 include/configs/pogo_v4.h
> > >
> > > diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h
> > > new file mode 100644
> > > index 0000000000..b449986e8c
> > > --- /dev/null
> > > +++ b/include/configs/pogo_v4.h
> > > @@ -0,0 +1,94 @@
> > > +/* SPDX-License-Identifier: GPL-2.0+ */
> > > +/*
> > > + * Copyright (C) 2014-2021 Tony Dinh <mibodhi@gmail.com>
> > > + *
> > > + * Based on
> > > + * Copyright (C) 2012
> > > + * David Purdy <david.c.purdy@gmail.com>
> > > + *
> > > + * Based on Kirkwood support:
> > > + * (C) Copyright 2009
> > > + * Marvell Semiconductor <www.marvell.com>
> > > + * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
> > > + */
> > > +
> > > +#ifndef _CONFIG_POGO_V4_H
> > > +#define _CONFIG_POGO_V4_H
> > > +
> > > +/*
> > > + * Machine type definition and ID
> > > + */
> > > +#define MACH_TYPE_POGO_V4          3960
> > > +#define CONFIG_MACH_TYPE           MACH_TYPE_POGO_V4
> >
> > Are you really using the pretty old CONFIG_MACH_TYPE to boot Linux
> > on this device?
> >
> > > +
> > > +/*
> > > + * High Level Configuration Options (easy to change)
> > > + */
> > > +#define CONFIG_FEROCEON_88FR131            /* #define CPU Core subversion */
> > > +#define CONFIG_KW88F6192           /* SOC Name */
> >
> > At least CONFIG_FEROCEON_88FR131 is available in Kconfig
> > (arch/arm/mach-kirkwood/Kconfig), so there should be no need to add it
> > via some header.
> >
> > Please double-check other macros in this header as well for availability
> > in Kconfig.
>
> At this point you can now make CI do this for you as we have a test that
> will fail if there's unmigrated symbols in your board header file.  The
> logic can also be copy/pasted out to a script to run by yourself too.

I have not used CI before (not sure how). But I used a script copied
from your post:

https://lists.denx.de/pipermail/u-boot/2021-September/460085.html

./check-migrated-symbols.sh include/configs/pogo_v4.h

That should be enough to see which ones to migrate, right?

Thanks,
Tony

> --
> Tom

Re: [PATCH v2 4/8] arm: kirkwood: Pogoplug-V4 : Add board include configs file

[Tom Rini]

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On Thu, Jan 13, 2022 at 04:50:20PM -0800, Tony Dinh wrote:
> Hi Tom,
> 
> On Thu, Jan 13, 2022 at 5:36 AM Tom Rini <trini@konsulko.com> wrote:
> >
> > On Thu, Jan 13, 2022 at 02:32:00PM +0100, Stefan Roese wrote:
> > > On 12/23/21 08:26, Tony Dinh wrote:
> > > > Add include configs file for Pogoplug V4 board
> > > >
> > > > Signed-off-by: Tony Dinh <mibodhi@gmail.com>
> > > > ---
> > > >
> > > > (no changes since v1)
> > > >
> > > >   include/configs/pogo_v4.h | 94 +++++++++++++++++++++++++++++++++++++++
> > > >   1 file changed, 94 insertions(+)
> > > >   create mode 100644 include/configs/pogo_v4.h
> > > >
> > > > diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h
> > > > new file mode 100644
> > > > index 0000000000..b449986e8c
> > > > --- /dev/null
> > > > +++ b/include/configs/pogo_v4.h
> > > > @@ -0,0 +1,94 @@
> > > > +/* SPDX-License-Identifier: GPL-2.0+ */
> > > > +/*
> > > > + * Copyright (C) 2014-2021 Tony Dinh <mibodhi@gmail.com>
> > > > + *
> > > > + * Based on
> > > > + * Copyright (C) 2012
> > > > + * David Purdy <david.c.purdy@gmail.com>
> > > > + *
> > > > + * Based on Kirkwood support:
> > > > + * (C) Copyright 2009
> > > > + * Marvell Semiconductor <www.marvell.com>
> > > > + * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
> > > > + */
> > > > +
> > > > +#ifndef _CONFIG_POGO_V4_H
> > > > +#define _CONFIG_POGO_V4_H
> > > > +
> > > > +/*
> > > > + * Machine type definition and ID
> > > > + */
> > > > +#define MACH_TYPE_POGO_V4          3960
> > > > +#define CONFIG_MACH_TYPE           MACH_TYPE_POGO_V4
> > >
> > > Are you really using the pretty old CONFIG_MACH_TYPE to boot Linux
> > > on this device?
> > >
> > > > +
> > > > +/*
> > > > + * High Level Configuration Options (easy to change)
> > > > + */
> > > > +#define CONFIG_FEROCEON_88FR131            /* #define CPU Core subversion */
> > > > +#define CONFIG_KW88F6192           /* SOC Name */
> > >
> > > At least CONFIG_FEROCEON_88FR131 is available in Kconfig
> > > (arch/arm/mach-kirkwood/Kconfig), so there should be no need to add it
> > > via some header.
> > >
> > > Please double-check other macros in this header as well for availability
> > > in Kconfig.
> >
> > At this point you can now make CI do this for you as we have a test that
> > will fail if there's unmigrated symbols in your board header file.  The
> > logic can also be copy/pasted out to a script to run by yourself too.
> 
> I have not used CI before (not sure how). But I used a script copied
> from your post:
> 
> https://lists.denx.de/pipermail/u-boot/2021-September/460085.html
> 
> ./check-migrated-symbols.sh include/configs/pogo_v4.h
> 
> That should be enough to see which ones to migrate, right?

Yup, that'll do it.

-- 
Tom

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