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From: Marek Vasut <marex@denx.de>
To: dri-devel@lists.freedesktop.org
Cc: Marek Vasut <marex@denx.de>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Sam Ravnborg <sam@ravnborg.org>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Robert Foss <robert.foss@linaro.org>
Subject: [PATCH 10/14] drm: bridge: icn6211: Disable DPI color swap
Date: Fri, 14 Jan 2022 04:48:34 +0100	[thread overview]
Message-ID: <20220114034838.546267-10-marex@denx.de> (raw)
In-Reply-To: <20220114034838.546267-1-marex@denx.de>

The chip is capable of swapping DPI RGB channels. The driver currently
does not implement support for this functionality. Write the MIPI_PN_SWAP
register to 0 to assure the color swap is disabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
To: dri-devel@lists.freedesktop.org
---
 drivers/gpu/drm/bridge/chipone-icn6211.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c
index 6daf2f8013733..e41e671fed46d 100644
--- a/drivers/gpu/drm/bridge/chipone-icn6211.c
+++ b/drivers/gpu/drm/bridge/chipone-icn6211.c
@@ -325,6 +325,7 @@ static void chipone_atomic_enable(struct drm_bridge *bridge,
 
 	ICN6211_DSI(icn, MIPI_PD_CK_LANE, 0xa0);
 	ICN6211_DSI(icn, PLL_CTRL(12), 0xff);
+	ICN6211_DSI(icn, MIPI_PN_SWAP, 0x00);
 
 	/* DPI HS/VS/DE polarity */
 	pol = ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? BIST_POL_HSYNC_POL : 0) |
-- 
2.34.1


  parent reply	other threads:[~2022-01-14  3:49 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-14  3:48 [PATCH 01/14] drm: bridge: icn6211: Fix register layout Marek Vasut
2022-01-14  3:48 ` [PATCH 02/14] drm: bridge: icn6211: Fix HFP_HSW_HBP_HI and HFP_MIN handling Marek Vasut
2022-01-14  3:48 ` [PATCH 03/14] drm: bridge: icn6211: Switch to atomic operations Marek Vasut
2022-01-14  3:48 ` [PATCH 04/14] drm: bridge: icn6211: Implement atomic_get_input_bus_fmts Marek Vasut
2022-01-14  3:48 ` [PATCH 05/14] drm: bridge: icn6211: Retrieve the display mode from the state Marek Vasut
2022-02-03 12:09   ` Maxime Ripard
2022-02-16 20:13     ` Marek Vasut
2022-01-14  3:48 ` [PATCH 06/14] drm: bridge: icn6211: Add HS/VS/DE polarity handling Marek Vasut
2022-01-14  3:48 ` [PATCH 07/14] drm: bridge: icn6211: Add DSI lane count DT property parsing Marek Vasut
2022-02-03 12:13   ` Maxime Ripard
2022-02-16 20:24     ` Marek Vasut
2022-01-14  3:48 ` [PATCH 08/14] drm: bridge: icn6211: Add generic DSI-to-DPI PLL configuration Marek Vasut
2022-01-14  3:48 ` [PATCH 09/14] drm: bridge: icn6211: Use DSI burst mode without EoT and with LP command mode Marek Vasut
2022-01-14  3:48 ` Marek Vasut [this message]
2022-01-14  3:48 ` [PATCH 11/14] drm: bridge: icn6211: Set SYS_CTRL_1 to value used in examples Marek Vasut
2022-01-14  3:48 ` [PATCH 12/14] drm: bridge: icn6211: Add I2C configuration support Marek Vasut
2022-01-14 10:24   ` kernel test robot
2022-01-14 10:24     ` kernel test robot
2022-02-03 12:17   ` Maxime Ripard
2022-01-14  3:48 ` [PATCH 13/14] drm: bridge: icn6211: Rename ICN6211_DSI to chipone_writeb Marek Vasut
2022-01-14  3:48 ` [PATCH 14/14] drm: bridge: icn6211: Read and validate chip IDs before configuration Marek Vasut
2022-01-14  8:16 ` [PATCH 01/14] drm: bridge: icn6211: Fix register layout Jagan Teki
2022-01-14 14:33   ` Marek Vasut

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