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[31.30.173.70]) by smtp.gmail.com with ESMTPSA id z7sm5536226wrm.117.2022.01.14.00.45.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jan 2022 00:45:51 -0800 (PST) Date: Fri, 14 Jan 2022 09:45:49 +0100 From: Andrew Jones To: Shuuichirou Ishii Subject: Re: [PATCH] hw/arm/virt: Default enable the virtualization option(VHE) on A64FX Message-ID: <20220114084549.5lkdhqushaxivpew@gator> References: <20220114072438.3085054-1-ishii.shuuichir@fujitsu.com> MIME-Version: 1.0 In-Reply-To: <20220114072438.3085054-1-ishii.shuuichir@fujitsu.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=drjones@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=170.10.129.124; envelope-from=drjones@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.595, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, f4bug@amsat.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, Jan 14, 2022 at 04:24:37PM +0900, Shuuichirou Ishii wrote: > At A64FX specification, VHE is enabled by default, so > the virtualization option should be enabled when -cpu a64fx > is specified. > > Signed-off-by: Shuuichirou Ishii > --- > hw/arm/virt.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index b45b52c90e..56acf5cc7e 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -1932,6 +1932,12 @@ static void machvirt_init(MachineState *machine) > firmware_loaded = virt_firmware_init(vms, sysmem, > secure_sysmem ?: sysmem); > > + /* A64FX proceesor is supported the ARMv8.1-VHE */ > + if (!vms->virt && > + !strncmp(machine->cpu_type, ARM_CPU_TYPE_NAME("a64fx"), 13)) { > + vms->virt = true; > + } > + > /* If we have an EL3 boot ROM then the assumption is that it will > * implement PSCI itself, so disable QEMU's internal implementation > * so it doesn't get in the way. Instead of starting secondary > -- > 2.27.0 > a64fx isn't the only CPU type the virt machine type supports which has EL2 support. In fact, all the CPU types supported by mach-virt do, unless KVM is enabled. So, while I understand the sentiment of this patch, it doesn't fit the current model. And, since we don't want to start accumulating hacks like this one in mach-virt, then the options are either a) push the problem up the stack to whatever constructs the QEMU command line or b) consider/propose a different machine type. Thanks, drew