From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A710CC433EF for ; Mon, 17 Jan 2022 13:07:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NrdACWdYTB1Pbh3R4Asu1CM3TbhSfU1xXNC6iPI4Riw=; b=X+yuFsUn2ZipBn rRN6It2C2QUX4rmRaOBCBPtwwFIS1eDQhzSZWXXbsU8F3xo8kAd4JWVC4jJAo5x/yPUysr3Blp5gi DrlR4DjxT/L3R8Cbr+13ZhPPuNdaWML7uUKK6BHoCO6CdHMXFOPwhMx0yN6o0/Scaw5cU9PTaCrqY WkbsFZwVpSOnDg9MmIJSh+MyUfRFsCIwt+DBw25+bUDARI1+j9nMrqgvMNEHjDReI5Hvs2Pq4v29c iFm9oItywgiBZlUfnrjvdVQEurgWZCTZfDrwt9PMYpudAgCCEgcoqqgWbwg1g416nXM8GppjnaCbd TKw6ArHQxr98KC+Xptqg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n9Ri0-00F0da-1s; Mon, 17 Jan 2022 13:06:04 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n9Rhv-00F0dA-TH for linux-arm-kernel@lists.infradead.org; Mon, 17 Jan 2022 13:06:01 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3EE1B1FB; Mon, 17 Jan 2022 05:05:58 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.38.30]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2695E3F73D; Mon, 17 Jan 2022 05:05:57 -0800 (PST) Date: Mon, 17 Jan 2022 13:05:54 +0000 From: Mark Rutland To: Andre Przywara Cc: linux-arm-kernel@lists.infradead.org, Jaxson.Han@arm.com, robin.murphy@arm.com, vladimir.murzin@arm.com, Wei.Chen@arm.com Subject: Re: [bootwrapper PATCH v2 06/13] aarch64: initialize SCTLR_ELx for the boot-wrapper Message-ID: <20220117130554.GB87485@C02TD0UTHF1T.local> References: <20220114105653.3003399-1-mark.rutland@arm.com> <20220114105653.3003399-7-mark.rutland@arm.com> <20220114181247.7b366f45@donnerap.cambridge.arm.com> <20220117121557.GA87485@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220117121557.GA87485@C02TD0UTHF1T.local> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220117_050600_017652_CB3A0672 X-CRM114-Status: GOOD ( 20.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jan 17, 2022 at 12:15:57PM +0000, Mark Rutland wrote: > On Fri, Jan 14, 2022 at 06:12:47PM +0000, Andre Przywara wrote: > > On Fri, 14 Jan 2022 10:56:46 +0000 > > Mark Rutland wrote: > > > > Hi Mark, > > Hi Andre, > > > + > > > +#define SCTLR_EL1_RES1 (BIT(29) | BIT(28) | BIT(23) | BIT(22) | \ > > > + BIT(11) | BIT(8) | BIT(7) | BIT(4)) > > > -#define SCTLR_EL1_RES1 (3 << 28 | 3 << 22 | 1 << 11) > > > > > > #ifdef KERNEL_32 > > > /* 32-bit kernel decompressor uses CP15 barriers */ > > > #define SCTLR_EL1_KERNEL (SCTLR_EL1_RES1 | SCTLR_EL1_CP15BEN) > > > > So I wonder if this actually works? The ARMv7 version of SCTLR > > differs in some bits from both the ARMv8 AArch32 version and more > > importantly the AArch64 version. > > I had troubles the other day running the > > arm32 Linux kernel decompressor with some ARMv8 SCTLR_EL1 reset value. The > > decompressor code does only read-modify-write of SCTLR (probably to > > cover multiple architecture revisions), so some bits might stay wrong. In > > particular I think having bits 28 and 29 set caused problems. > > By looking at the ARMv7 ARM and with experimentation I came up > > with 0x00c00878 as a safe and working value. Having re-read all of this, I believe you're right; I'll rework the AArch32-kernel SCTLR_EL1_KERNEL to not use the AArch64 bit definitions, and I'll add some commentary explaining that we're writing to the AArch32 format. > > Shall we have a separate reset value for 32bit? Assuming you meant to alter the SCTLR_ELx_KERNEL definition, yes. The idea of splitting the SCTLR_ELx_RESET and SCTLR_ELx_KERNEL definitions was that the former would be whatever the boot-wrapper needed to run at ELx, and the latter was whatever we must initialize for the kernel to run at ELx, so I don't want to put the AArch32 kernel bits into SCTLR_EL1_RESET. My only remaining concern is exactly what we must initialize. If there's any documentation we can refer to, that'd be great, otherwise I'll dig through your prior suggestion. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel