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From: Terry Bowman <terry.bowman@amd.com>
To: <terry.bowman@amd.com>, <linux@roeck-us.net>,
	<linux-watchdog@vger.kernel.org>, <jdelvare@suse.com>,
	<linux-i2c@vger.kernel.org>, <wsa@kernel.org>,
	<andy.shevchenko@gmail.com>, <rafael.j.wysocki@intel.com>
Cc: <linux-kernel@vger.kernel.org>, <wim@linux-watchdog.org>,
	<rrichter@amd.com>, <thomas.lendacky@amd.com>,
	<sudheesh.mavila@amd.com>, <Nehal-bakulchandra.Shah@amd.com>,
	<Basavaraj.Natikar@amd.com>, <Shyam-sundar.S-k@amd.com>,
	<Mario.Limonciello@amd.com>
Subject: [PATCH v3 9/9] i2c: piix4: Enable EFCH MMIO for Family 17h+
Date: Wed, 19 Jan 2022 17:06:26 -0600	[thread overview]
Message-ID: <20220119230626.31560-10-terry.bowman@amd.com> (raw)
In-Reply-To: <20220119230626.31560-1-terry.bowman@amd.com>

Enable EFCH MMIO using check for SMBus PCI revision ID value 0x51 or
greater. SMBus PCI revision ID 0x51 is first used by family 17h. This
PCI revision ID check will also enable future AMD processors with the
same EFCH SMBus controller HW.

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
---
 drivers/i2c/busses/i2c-piix4.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 1811bdc96363..1e8061c46a89 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -102,6 +102,8 @@
 #define SB800_PIIX4_FCH_PM_ADDR                 0xFED80300
 #define SB800_PIIX4_FCH_PM_SIZE                 8
 
+#define AMD_PCI_SMBUS_REVISION_MMIO             0x51
+
 /* insmod parameters */
 
 /* If force is set to anything different from 0, we forcibly enable the
@@ -229,6 +231,13 @@ static void piix4_sb800_region_release(struct device *dev,
 	}
 }
 
+static bool piix4_sb800_use_mmio(struct pci_dev *PIIX4_dev)
+{
+	return (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
+		PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS &&
+		PIIX4_dev->revision >= AMD_PCI_SMBUS_REVISION_MMIO);
+}
+
 static int piix4_setup(struct pci_dev *PIIX4_dev,
 		       const struct pci_device_id *id)
 {
@@ -339,7 +348,7 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev,
 	u8 smba_en_hi;
 	int retval;
 
-	mmio_cfg.use_mmio = 0;
+	mmio_cfg.use_mmio = piix4_sb800_use_mmio(PIIX4_dev);
 
 	retval = piix4_sb800_region_setup(&PIIX4_dev->dev, &mmio_cfg);
 	if (retval)
-- 
2.30.2


  parent reply	other threads:[~2022-01-19 23:09 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-19 23:06 [PATCH v3 0/9] i2c: piix4: Replace cd6h/cd7h port I/O accesses with MMIO accesses Terry Bowman
2022-01-19 23:06 ` [PATCH v3 1/9] kernel/resource: Introduce request_muxed_mem_region() Terry Bowman
2022-01-20 11:16   ` Andy Shevchenko
2022-01-20 13:53     ` Terry Bowman
2022-01-19 23:06 ` [PATCH v3 2/9] i2c: piix4: Replace hardcoded memory map size with a #define Terry Bowman
2022-01-19 23:06 ` [PATCH v3 3/9] i2c: piix4: Move port I/O region request/release code into functions Terry Bowman
2022-01-19 23:06 ` [PATCH v3 4/9] i2c: piix4: Move SMBus controller base address detect into function Terry Bowman
2022-01-19 23:06 ` [PATCH v3 5/9] i2c: piix4: Move SMBus port selection " Terry Bowman
2022-01-19 23:06 ` [PATCH v3 6/9] i2c: piix4: Add EFCH MMIO support to region request and release Terry Bowman
2022-01-19 23:06 ` [PATCH v3 7/9] i2c: piix4: Add EFCH MMIO support to SMBus base address detect Terry Bowman
2022-01-20 11:27   ` Andy Shevchenko
2022-01-20 13:59     ` Terry Bowman
2022-01-24 21:04     ` Terry Bowman
2022-01-27 21:35       ` Wolfram Sang
2022-01-19 23:06 ` [PATCH v3 8/9] i2c: piix4: Add EFCH MMIO support for SMBus port select Terry Bowman
2022-01-20 11:28   ` Andy Shevchenko
2022-01-20 14:00     ` Terry Bowman
2022-01-21 21:02     ` Terry Bowman
2022-01-21 21:07       ` Wolfram Sang
2022-01-19 23:06 ` Terry Bowman [this message]
2022-01-20 11:30 ` [PATCH v3 0/9] i2c: piix4: Replace cd6h/cd7h port I/O accesses with MMIO accesses Andy Shevchenko

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