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David Alan Gilbert" , , , , , Brijesh Singh Subject: [PATCH v9 33/43] x86/compressed: Add SEV-SNP feature detection/setup Date: Fri, 28 Jan 2022 11:17:54 -0600 Message-ID: <20220128171804.569796-34-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220128171804.569796-1-brijesh.singh@amd.com> References: <20220128171804.569796-1-brijesh.singh@amd.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5b942c6c-2752-4dd9-34de-08d9e2824e6c X-MS-TrafficTypeDiagnostic: DM6PR12MB4265:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zDIzQRGHl4fqxjNCLTfFsujXanVCyq0czMPvaqrHum+TNvE33SlAWK/1Nwgwe4r6ljQ2pVuYtRtMBCOrTSKNod91vYOkFx+y5GLDbdJ2IAgzKZT8eaQgPDr+lSR/I+D9hLCo27MBOMb48ELJOy13RH7POhzgdmlwAO0Sl0UlyU/KhQr5DXi4RADiD8BH5owmqA/8EUx+yMXp7TmNbYwXMnKuNV5RqFtQcoYnxqV36mwxsKJdyo0MHNYvWe6ORjGYTNABW/4YH0kBbwmaRbYnhVMu0mpAh2th9ijtWxYcHuY1AomUTFozjRfhpKyCFvHM8NvIln0xXIJpw/64QWt4NsoL6EVFsUxlhiDNUSRcMryiCTe1M32NCuztMeqfOLJvqWEyn9hGH26tFaxn5LZU76i9IFQ/rR9sN9SbkcePwURGj2NoMtQmBQRa2dmjfSzoXlDBRz2PeBTSkOK8aNJcJ8ZRSimQj6DLMsLAQnTwzbf+UGnQ2vQ8HlH/z84nCQfj1TY+oTH09Nkb/nOyEfkG8v78w7oIuBRIq4jTxf2nadb45TgMImDi5d5gcWSfTjJhvLogEcOoy1++AKVUKdXNJkbtn8HcpgvWa98RfTk75aoaqY6NiUEcHzxUmIsW/xuBrdiq16NATvF9lmIvodWwA4kqUP/RjsRy38F9Turd2s03hJxQiPXZMiDhteeZjci2Yo0oXTQ9Rd4HSYJnol48zZ2c0389zhXK2qefhWhFyXw= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(40470700004)(46966006)(8676002)(7416002)(7406005)(44832011)(8936002)(70206006)(36756003)(47076005)(70586007)(54906003)(110136005)(316002)(4326008)(5660300002)(82310400004)(16526019)(356005)(36860700001)(7696005)(2906002)(6666004)(508600001)(83380400001)(81166007)(86362001)(40460700003)(2616005)(426003)(26005)(186003)(1076003)(336012)(2101003)(36900700001)(20210929001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2022 17:19:13.7882 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5b942c6c-2752-4dd9-34de-08d9e2824e6c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4265 From: Michael Roth Initial/preliminary detection of SEV-SNP is done via the Confidential Computing blob. Check for it prior to the normal SEV/SME feature initialization, and add some sanity checks to confirm it agrees with SEV-SNP CPUID/MSR bits. Signed-off-by: Michael Roth Signed-off-by: Brijesh Singh --- arch/x86/boot/compressed/sev.c | 118 ++++++++++++++++++++++++++++++++- arch/x86/include/asm/sev.h | 3 + 2 files changed, 120 insertions(+), 1 deletion(-) diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c index 1b80c1d0ea1f..04cabff015ba 100644 --- a/arch/x86/boot/compressed/sev.c +++ b/arch/x86/boot/compressed/sev.c @@ -286,6 +286,13 @@ static void enforce_vmpl0(void) void sev_enable(struct boot_params *bp) { unsigned int eax, ebx, ecx, edx; + bool snp; + + /* + * Setup/preliminary detection of SEV-SNP. This will be sanity-checked + * against CPUID/MSR values later. + */ + snp = snp_init(bp); /* Check for the SME/SEV support leaf */ eax = 0x80000000; @@ -306,8 +313,11 @@ void sev_enable(struct boot_params *bp) ecx = 0; native_cpuid(&eax, &ebx, &ecx, &edx); /* Check whether SEV is supported */ - if (!(eax & BIT(1))) + if (!(eax & BIT(1))) { + if (snp) + error("SEV-SNP support indicated by CC blob, but not CPUID."); return; + } /* Set the SME mask if this is an SEV guest. */ sev_status = rd_sev_status_msr(); @@ -332,5 +342,111 @@ void sev_enable(struct boot_params *bp) enforce_vmpl0(); } + if (snp && !(sev_status & MSR_AMD64_SEV_SNP_ENABLED)) + error("SEV-SNP supported indicated by CC blob, but not SEV status MSR."); + sme_me_mask = BIT_ULL(ebx & 0x3f); } + +/* Search for Confidential Computing blob in the EFI config table. */ +static struct cc_blob_sev_info *snp_find_cc_blob_efi(struct boot_params *bp) +{ + unsigned long cfg_table_pa; + unsigned int cfg_table_len; + int ret; + + ret = efi_get_conf_table(bp, &cfg_table_pa, &cfg_table_len); + if (ret) + return NULL; + + return (struct cc_blob_sev_info *)efi_find_vendor_table(bp, cfg_table_pa, + cfg_table_len, + EFI_CC_BLOB_GUID); +} + +struct cc_setup_data { + struct setup_data header; + u32 cc_blob_address; +}; + +static struct cc_setup_data *get_cc_setup_data(struct boot_params *bp) +{ + struct setup_data *hdr = (struct setup_data *)bp->hdr.setup_data; + + while (hdr) { + if (hdr->type == SETUP_CC_BLOB) + return (struct cc_setup_data *)hdr; + hdr = (struct setup_data *)hdr->next; + } + + return NULL; +} + +/* + * Search for a Confidential Computing blob passed in as a setup_data entry + * via the Linux Boot Protocol. + */ +static struct cc_blob_sev_info *snp_find_cc_blob_setup_data(struct boot_params *bp) +{ + struct cc_setup_data *sd; + + sd = get_cc_setup_data(bp); + if (!sd) + return NULL; + + return (struct cc_blob_sev_info *)(unsigned long)sd->cc_blob_address; +} + +/* + * Initial set up of SEV-SNP relies on information provided by the + * Confidential Computing blob, which can be passed to the boot kernel + * by firmware/bootloader in the following ways: + * + * - via an entry in the EFI config table + * - via a setup_data structure, as defined by the Linux Boot Protocol + * + * Scan for the blob in that order. + */ +static struct cc_blob_sev_info *snp_find_cc_blob(struct boot_params *bp) +{ + struct cc_blob_sev_info *cc_info; + + cc_info = snp_find_cc_blob_efi(bp); + if (cc_info) + goto found_cc_info; + + cc_info = snp_find_cc_blob_setup_data(bp); + if (!cc_info) + return NULL; + +found_cc_info: + if (cc_info->magic != CC_BLOB_SEV_HDR_MAGIC) + sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED); + + return cc_info; +} + +bool snp_init(struct boot_params *bp) +{ + struct cc_blob_sev_info *cc_info; + + if (!bp) + return false; + + cc_info = snp_find_cc_blob(bp); + if (!cc_info) + return false; + + /* + * Pass run-time kernel a pointer to CC info via boot_params so EFI + * config table doesn't need to be searched again during early startup + * phase. + */ + bp->cc_blob_address = (u32)(unsigned long)cc_info; + + /* + * Indicate SEV-SNP based on presence of SEV-SNP-specific CC blob. + * Subsequent checks will verify SEV-SNP CPUID/MSR bits. + */ + return true; +} diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index 1a7e21bb6eea..4e3909042001 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -11,6 +11,7 @@ #include #include #include +#include #define GHCB_PROTOCOL_MIN 1ULL #define GHCB_PROTOCOL_MAX 2ULL @@ -151,6 +152,7 @@ void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op void snp_set_memory_shared(unsigned long vaddr, unsigned int npages); void snp_set_memory_private(unsigned long vaddr, unsigned int npages); void snp_set_wakeup_secondary_cpu(void); +bool snp_init(struct boot_params *bp); #else static inline void sev_es_ist_enter(struct pt_regs *regs) { } static inline void sev_es_ist_exit(void) { } @@ -168,6 +170,7 @@ static inline void __init snp_prep_memory(unsigned long paddr, unsigned int sz, static inline void snp_set_memory_shared(unsigned long vaddr, unsigned int npages) { } static inline void snp_set_memory_private(unsigned long vaddr, unsigned int npages) { } static inline void snp_set_wakeup_secondary_cpu(void) { } +static inline bool snp_init(struct boot_params *bp) { return false; } #endif #endif -- 2.25.1