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To: Mark Rutland <>
Cc:, Mark Brown <>
Subject: [boot-wrapper PATCH 1/2] aarch64: Document what we're doing when setting ZCR_EL3.LEN
Date: Tue,  1 Feb 2022 17:21:31 +0000	[thread overview]
Message-ID: <> (raw)

From: Mark Brown <>

The enumeration and configuration algorithm for SVE vector lengths is not
100% obvious so add a comment explaining what's going on in case someone
looks at this code as a reference. If this is ever used on hardware with
asymmetric vector lengths we will need to handle this differently to meet
Linux's boot requirements but this is not a present issue and such hardware
would be fairly surprising.

Signed-off-by: Mark Brown <>
 arch/aarch64/init.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/aarch64/init.c b/arch/aarch64/init.c
index aa58567..8bb0524 100644
--- a/arch/aarch64/init.c
+++ b/arch/aarch64/init.c
@@ -88,6 +88,10 @@ void cpu_init_el3(void)
 		cptr |= CPTR_EL3_EZ;
 		msr(CPTR_EL3, cptr);
+		/*
+		 * Write the maximum possible vector length, hardware
+		 * will constrain to the actual limit.
+		 */
 		msr(ZCR_EL3, ZCR_EL3_LEN_MAX);

linux-arm-kernel mailing list

             reply	other threads:[~2022-02-01 17:23 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-01 17:21 broonie [this message]
2022-02-01 17:21 ` [boot-wrapper PATCH 2/2] aarch64: Enable use of SME by EL2 and below broonie
2022-02-01 18:16   ` Mark Rutland
2022-02-01 18:22     ` Mark Brown
2022-02-02 10:30       ` Mark Rutland
2022-02-04 10:59     ` Mark Rutland

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