From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by smtp.lore.kernel.org (Postfix) with ESMTP id A35B5C433F5 for ; Wed, 9 Feb 2022 04:47:46 +0000 (UTC) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5877F410FD; Wed, 9 Feb 2022 05:47:45 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id DC9A3410F3; Wed, 9 Feb 2022 05:47:42 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644382063; x=1675918063; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8Ruajt7+Gs1XOvpeav4agIFAaS+xrD3qHUC1l3H7eEs=; b=RU5Mfg7acNWp+Pa+MwxMdQgvcxpHhTsQULuwIpDTcr9mxx714j57Rhl7 GbJRrl40qO8w1Cjt7PYg3qDgtPFTgfZeAm6nYskarFvnFAvEU+GC8FwKm wj3rKJBspKvnxH3l/dyXdQphi8ipXTXWoXT9JMaTkKEgjBKA+I2yIqYcs ar9mUQS0PMCg7d0OQ6xGs1HRbmk/ZBU4/RU0dXoo53W4Ol1s54C5p1Xkp 8HbqVmh57EUKvv398nuDn9t5zA07yDDtXvjR7e9VN1R//S6Yh4n1AriDP bKpPtMlUpb68jzHepK4FSZoG+pz84Kcr8mke9oNjK+WpPRNVZ3IoXYCqF g==; X-IronPort-AV: E=McAfee;i="6200,9189,10252"; a="273652318" X-IronPort-AV: E=Sophos;i="5.88,354,1635231600"; d="scan'208";a="273652318" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2022 20:47:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,354,1635231600"; d="scan'208";a="585437723" Received: from dpdk-jf-ntb-v1.sh.intel.com ([10.67.119.116]) by fmsmga008.fm.intel.com with ESMTP; 08 Feb 2022 20:47:40 -0800 From: Junfeng Guo To: jingjing.wu@intel.com Cc: dev@dpdk.org, stable@dpdk.org, junfeng.guo@intel.com Subject: [PATCH v3] raw/ntb: clear all valid DB bits when DB init Date: Wed, 9 Feb 2022 12:47:16 +0800 Message-Id: <20220209044716.3709178-1-junfeng.guo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220209043903.3699229-1-junfeng.guo@intel.com> References: <20220209043903.3699229-1-junfeng.guo@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Before registering the doorbell interrupt handler callback function, all the valid doorbell bits within the NTB private data struct should be cleared to avoid the confusion of the handshake timing sequence diagram when setting up the NTB connection in back-to-back mode. Fixes: 62012a76811e ("raw/ntb: add handshake process") Cc: stable@dpdk.org Signed-off-by: Junfeng Guo --- drivers/raw/ntb/ntb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/raw/ntb/ntb.c b/drivers/raw/ntb/ntb.c index 46ac02e5ab..cc611dfbb9 100644 --- a/drivers/raw/ntb/ntb.c +++ b/drivers/raw/ntb/ntb.c @@ -1398,6 +1398,8 @@ ntb_init_hw(struct rte_rawdev *dev, struct rte_pci_device *pci_dev) /* Init doorbell. */ hw->db_valid_mask = RTE_LEN2MASK(hw->db_cnt, uint64_t); + /* Clear all valid doorbell bits before registering intr handler */ + (*hw->ntb_ops->db_clear)(dev, hw->db_valid_mask); intr_handle = pci_dev->intr_handle; /* Register callback func to eal lib */ -- 2.25.1