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From: Ulrich Hecht <uli+renesas@fpond.eu>
To: linux-renesas-soc@vger.kernel.org
Cc: netdev@vger.kernel.org, davem@davemloft.net,
	linux-can@vger.kernel.org,
	prabhakar.mahadev-lad.rj@bp.renesas.com,
	biju.das.jz@bp.renesas.com, wsa@kernel.org,
	yoshihiro.shimoda.uh@renesas.com, wg@grandegger.com,
	mkl@pengutronix.de, kuba@kernel.org, mailhol.vincent@wanadoo.fr,
	socketcan@hartkopp.net, geert@linux-m68k.org,
	kieran.bingham@ideasonboard.com,
	Ulrich Hecht <uli+renesas@fpond.eu>
Subject: [PATCH v3 0/4] can: rcar_canfd: Add support for V3U flavor
Date: Wed,  9 Feb 2022 17:38:02 +0100	[thread overview]
Message-ID: <20220209163806.18618-1-uli+renesas@fpond.eu> (raw)

Hi!

This adds CANFD support for V3U (R8A779A0) SoCs. The V3U's IP supports up
to eight channels and has some other minor differences to the Gen3 variety:

- changes to some register offsets and layouts
- absence of "classic CAN" registers, both modes are handled through the
  CANFD register set

This patch set tries to accommodate these changes in a minimally intrusive
way.

This revision tries to address all issues raised by reviewers, and drops
the clock patch that has since been picked up; see below for details.
Thanks to Vincent, Marc and Geert for their reviews and suggestions.

It has been successfully tested remotely on a V3U Falcon board, but only
with channels 0 and 1. We were not able to get higher channels to work in
both directions yet. It is not currently clear if this is an issue with the
driver, the board or the silicon, but the BSP vendor driver only works with
channels 0 and 1 as well, so my bet is on one of the latter. For this
reason, this series only enables known-working channels 0 and 1 on Falcon.

CU
Uli


Changes since v2:
- dropped upstreamed clock patch
- replaced bracket/ternary maze with inline functions
- improved indentation to better reflect the logic
- removed redundant CAN mode check
- replaced strcpy() with initializer
- minor refactoring
- add Reviewed-Bys

Changes since v1:
- clk: added missing CANFD module clock
- driver: fixed tests for RZ/G2L so they won't break V3U
- driver: simplified two macros
- DT: enabled devices 0 and 1 on Falcon board
- DT: changed assigned-clock-rates to 80000000
- DT: added interrupt names


Ulrich Hecht (4):
  can: rcar_canfd: Add support for r8a779a0 SoC
  arm64: dts: renesas: r8a779a0: Add CANFD device node
  arm64: dts: renesas: r8a779a0-falcon: enable CANFD 0 and 1
  dt-bindings: can: renesas,rcar-canfd: Document r8a779a0 support

 .../bindings/net/can/renesas,rcar-canfd.yaml  |   2 +
 .../boot/dts/renesas/r8a779a0-falcon.dts      |  24 ++
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi     |  56 +++++
 drivers/net/can/rcar/rcar_canfd.c             | 219 ++++++++++++------
 4 files changed, 228 insertions(+), 73 deletions(-)

-- 
2.20.1


             reply	other threads:[~2022-02-09 16:41 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-09 16:38 Ulrich Hecht [this message]
2022-02-09 16:38 ` [PATCH v3 1/4] can: rcar_canfd: Add support for r8a779a0 SoC Ulrich Hecht
2022-02-10 13:15   ` Simon Horman
2022-02-12 16:47   ` Marc Kleine-Budde
2022-02-14  7:10   ` Vincent MAILHOL
2022-03-09 16:25     ` Ulrich Hecht
2022-02-09 16:38 ` [PATCH v3 2/4] arm64: dts: renesas: r8a779a0: Add CANFD device node Ulrich Hecht
2022-02-09 16:38 ` [PATCH v3 3/4] arm64: dts: renesas: r8a779a0-falcon: enable CANFD 0 and 1 Ulrich Hecht
2022-02-09 16:38 ` [PATCH v3 4/4] dt-bindings: can: renesas,rcar-canfd: Document r8a779a0 support Ulrich Hecht

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