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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org
Subject: [PATCH v2 02/15] target/arm: Set TCR_EL1.TSZ for user-only
Date: Thu, 10 Feb 2022 15:04:10 +1100	[thread overview]
Message-ID: <20220210040423.95120-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220210040423.95120-1-richard.henderson@linaro.org>

Set this as the kernel would, to 48 bits, to keep the computation
of the address space correct for PAuth.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 5a9c02a256..92f19f919a 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -206,10 +206,11 @@ static void arm_cpu_reset(DeviceState *dev)
                 aarch64_sve_zcr_get_valid_len(cpu, cpu->sve_default_vq - 1);
         }
         /*
+         * Enable 48-bit address space (TODO: take reserved_va into account).
          * Enable TBI0 but not TBI1.
          * Note that this must match useronly_clean_ptr.
          */
-        env->cp15.tcr_el[1].raw_tcr = (1ULL << 37);
+        env->cp15.tcr_el[1].raw_tcr = 5 | (1ULL << 37);
 
         /* Enable MTE */
         if (cpu_isar_feature(aa64_mte, cpu)) {
-- 
2.25.1



  parent reply	other threads:[~2022-02-10  4:09 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-10  4:04 [PATCH v2 00/15] target/arm: Implement LVA, LPA, LPA2 features Richard Henderson
2022-02-10  4:04 ` [PATCH v2 01/15] hw/registerfields: Add FIELD_SEX<N> and FIELD_SDP<N> Richard Henderson
2022-02-10 11:15   ` Philippe Mathieu-Daudé via
2022-02-10  4:04 ` Richard Henderson [this message]
2022-02-15 21:50   ` [PATCH v2 02/15] target/arm: Set TCR_EL1.TSZ for user-only Peter Maydell
2022-02-10  4:04 ` [PATCH v2 03/15] target/arm: Fault on invalid TCR_ELx.TxSZ Richard Henderson
2022-02-15 21:51   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 04/15] target/arm: Move arm_pamax out of line Richard Henderson
2022-02-15 21:51   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 05/15] target/arm: Pass outputsize down to check_s2_mmu_setup Richard Henderson
2022-02-15 21:57   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 06/15] target/arm: Use MAKE_64BIT_MASK to compute indexmask Richard Henderson
2022-02-10 11:15   ` Philippe Mathieu-Daudé via
2022-02-10  4:04 ` [PATCH v2 07/15] target/arm: Honor TCR_ELx.{I}PS Richard Henderson
2022-02-15 22:01   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 08/15] target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA Richard Henderson
2022-02-15 22:03   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 09/15] target/arm: Implement FEAT_LVA Richard Henderson
2022-02-15 22:05   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 10/15] target/arm: Implement FEAT_LPA Richard Henderson
2022-02-15 22:06   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 11/15] target/arm: Extend arm_fi_to_lfsc to level -1 Richard Henderson
2022-02-15 22:11   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 12/15] target/arm: Introduce tlbi_aa64_get_range Richard Henderson
2022-02-15 22:14   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 13/15] target/arm: Fix TLBIRange.base for 16k and 64k pages Richard Henderson
2022-02-15 22:18   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 14/15] target/arm: Validate tlbi TG matches translation granule in use Richard Henderson
2022-02-15 22:24   ` Peter Maydell
2022-02-10  4:04 ` [PATCH v2 15/15] target/arm: Implement FEAT_LPA2 Richard Henderson
2022-02-16 17:50   ` Peter Maydell
2022-02-16 17:51 ` [PATCH v2 00/15] target/arm: Implement LVA, LPA, LPA2 features Peter Maydell
2022-02-17 14:07 ` Peter Maydell
2022-02-17 17:37   ` Alex Bennée
2022-02-18  3:47     ` Richard Henderson
2022-02-23 21:08   ` Richard Henderson

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