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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT063.mail.protection.outlook.com (10.13.177.110) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4975.11 via Frontend Transport; Tue, 15 Feb 2022 21:45:07 +0000 Received: from tr4.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Tue, 15 Feb 2022 15:45:04 -0600 From: Alex Deucher To: Subject: [PATCH 0/6] Update DCN 3.1 support for 3.1.6 Date: Tue, 15 Feb 2022 16:44:43 -0500 Message-ID: <20220215214447.2234978-1-alexander.deucher@amd.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: cf58bde6-415b-49bc-59d7-08d9f0cc6ec7 X-MS-TrafficTypeDiagnostic: LV2PR12MB5799:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4714; 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CAT:NONE; SFS:(13230001)(4636009)(36840700001)(40470700004)(46966006)(36756003)(8936002)(2616005)(40460700003)(186003)(16526019)(2906002)(4326008)(26005)(5660300002)(15650500001)(1076003)(70586007)(8676002)(356005)(81166007)(70206006)(7696005)(508600001)(6916009)(83380400001)(316002)(47076005)(36860700001)(426003)(6666004)(336012)(82310400004)(86362001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Feb 2022 21:45:07.1563 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cf58bde6-415b-49bc-59d7-08d9f0cc6ec7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT063.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5799 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Deucher Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Update DCN 3.1 for 3.1.6. This is a minor update to DCN 3.1 display support in amdgpu. The first two patches are register headers so I did not send them out due to size. Hansen Dsouza (1): drm/amd/display: Add DCN316 resource and SMU clock manager Leo Li (3): drm/amd/include: Add register headers for DCN 3.1.6 drm/amd/include: Add MP 13.0.8 register headers drm/amd/display: Add DMUB support for DCN316 Prike Liang (2): drm/amd/display: configure dc hw resource for DCN 3.1.6 drm/amdgpu/discovery: Add sw DM function for 3.1.6 DCE drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 + .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +- .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 3 +- drivers/gpu/drm/amd/display/dc/Makefile | 1 + .../display/dc/bios/command_table_helper2.c | 1 + .../gpu/drm/amd/display/dc/clk_mgr/Makefile | 10 + .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 16 + .../dc/clk_mgr/dcn316/dcn316_clk_mgr.c | 706 + .../dc/clk_mgr/dcn316/dcn316_clk_mgr.h | 49 + .../display/dc/clk_mgr/dcn316/dcn316_smu.c | 328 + .../display/dc/clk_mgr/dcn316/dcn316_smu.h | 128 + .../gpu/drm/amd/display/dc/core/dc_resource.c | 8 + .../gpu/drm/amd/display/dc/dcn316/Makefile | 56 + .../amd/display/dc/dcn316/dcn316_resource.c | 2306 + .../amd/display/dc/dcn316/dcn316_resource.h | 42 + drivers/gpu/drm/amd/display/dc/gpio/Makefile | 1 + .../gpu/drm/amd/display/dc/gpio/hw_factory.c | 1 + .../drm/amd/display/dc/gpio/hw_translate.c | 1 + drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 + drivers/gpu/drm/amd/display/dmub/src/Makefile | 2 + .../drm/amd/display/dmub/src/dmub_dcn316.c | 62 + .../drm/amd/display/dmub/src/dmub_dcn316.h | 33 + .../gpu/drm/amd/display/dmub/src/dmub_srv.c | 4 + .../gpu/drm/amd/display/include/dal_asic_id.h | 6 +- .../gpu/drm/amd/display/include/dal_types.h | 1 + .../include/asic_reg/dcn/dcn_3_1_6_offset.h | 15682 ++ .../include/asic_reg/dcn/dcn_3_1_6_sh_mask.h | 62717 +++++++ .../include/asic_reg/dpcs/dpcs_4_2_3_offset.h | 11969 ++ .../asic_reg/dpcs/dpcs_4_2_3_sh_mask.h | 136141 +++++++++++++++ .../include/asic_reg/mp/mp_13_0_8_offset.h | 410 + .../include/asic_reg/mp/mp_13_0_8_sh_mask.h | 603 + 31 files changed, 231300 insertions(+), 3 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn316/Makefile create mode 100644 drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_6_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_6_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_3_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_3_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_8_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_8_sh_mask.h -- 2.34.1